Enhanced OP3 algorithms for net cuts, net joins, and probe points for a digital design
First Claim
1. A method of automating the determination of the optimal edit location on an integrated circuit for the purpose of making layout structural changes while maintaining logic design integrity, comprising the method steps of:
- a. providing a database for said integrated circuit, said database including functional unit placement and connectivity data including conducting net data, and building blocks of different functional units and features in layout form, said database containing said functional unit placement and connectivity data, and said building block data of different functional units and features being in polygon form;
b. providing layer-by-layer layout information for said integrated circuit;
c. providing an interface with said database to acquire all feature polygons on a given integrated circuit design;
d. applying user defined constraints and limitations to optimize edit location searches;
e. using enhanced algorithms to find, from said database and said layout information, the optimal at least one edit location under said user defined constraints; and
f. reporting said optimal at least one edit location to said user.
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Accused Products
Abstract
Enhanced algorithms are provided for finding circuit edit locations which utilize automated conversions from circuit schematic to physical layout design. The enhanced algorithms further include a user interface enabling the user to provide preferences, limitations, and constraints in order to bias the search to be conducted, as well as using the provided design data in order to locate the best positions for particular edit schemes, including net cuts and net joins.
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Citations
27 Claims
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1. A method of automating the determination of the optimal edit location on an integrated circuit for the purpose of making layout structural changes while maintaining logic design integrity, comprising the method steps of:
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a. providing a database for said integrated circuit, said database including functional unit placement and connectivity data including conducting net data, and building blocks of different functional units and features in layout form, said database containing said functional unit placement and connectivity data, and said building block data of different functional units and features being in polygon form; b. providing layer-by-layer layout information for said integrated circuit; c. providing an interface with said database to acquire all feature polygons on a given integrated circuit design; d. applying user defined constraints and limitations to optimize edit location searches; e. using enhanced algorithms to find, from said database and said layout information, the optimal at least one edit location under said user defined constraints; and f. reporting said optimal at least one edit location to said user. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23)
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24. An automated system for determining edit locations, said system including:
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a) a database for said integrated circuit, said database including functional unit placement and connectivity data including conducting net data, and building blocks of different functional units and features in layout form, said database containing said functional unit placement and connectivity data, and said building block data of different functional units and features being in polygon form; b) layer-by-layer layout information for said integrated circuit; c) an interface with said database to acquire all feature polygons on a given integrated circuit design; said automated system configured to; d) apply user defined constraints and limitations to optimize edit location searches; e) use enhanced algorithms to find, from said database and said layout information, the optimal at least one edit location under said user defined constraints; and f) report said optimal at least one edit location to said user. - View Dependent Claims (25, 26, 27)
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Specification