ADAPTIVE RADIO TRANSCEIVER WITH FILTERING

• US 20070285154A1
• Filed: 06/01/2007
• Published: 12/13/2007
• Est. Priority Date: 10/21/1999
• Status: Active Grant

• Current Assignee: Avago Technologies International Sales Pte Limited (Broadcom, Inc.)
• Original Assignee: Broadcom Corporation (Broadcom, Inc.)
• Inventors: Darabi, Hooman, Rofougaran, Ahmadreza, Khorram, Shahla, Ibrahim, Brima
• Granted Patent: US 7,389,087 B2
• Time in Patent Office: Days
• US Class Current: 327/551
• CPC Class Codes: H03B 21/01 by beating unmodulated signals of different frequencies
• CPC Class Codes: H03B 27/00 Generation of oscillations providing a plurality of outputs of the same frequency but differing in phase, other than merely two anti-phase outputs
• CPC Class Codes: H03F 1/56 Modifications of input or output impedances, not otherwise provided for
• CPC Class Codes: H03F 2200/318 A matching circuit being used as coupling element between two amplifying stages
• CPC Class Codes: H03F 2200/336 A I/Q, i.e. phase quadrature, modulator or demodulator being used in an amplifying circuit
• CPC Class Codes: H03F 2200/451 the amplifier being a radio frequency amplifier
• CPC Class Codes: H03F 2203/45138 Two or more differential amplifiers in IC-block form are combined, e.g. measuring amplifiers
• CPC Class Codes: H03F 2203/45386 the AAC comprising one or more coils in the source circuit
• CPC Class Codes: H03F 2203/45526 the FBC comprising a resistor-capacitor combination and being coupled between the LC and the IC
• CPC Class Codes: H03F 2203/45528 the FBC comprising one or more passive resistors and being coupled between the LC and the IC
• CPC Class Codes: H03F 2203/45638 the LC comprising one or more coils
• CPC Class Codes: H03F 3/19 with semiconductor devices only
• CPC Class Codes: H03F 3/245 with semiconductor devices only
• CPC Class Codes: H03F 3/45179 using MOSFET transistors as the active amplifying circuit H03F3/45278 takes precedence
• CPC Class Codes: H03F 3/45475 using IC blocks as the active amplifying circuit
• CPC Class Codes: H03G 11/00 Limiting amplitude; Limiting rate of change of amplitude ; Clipping in general
• CPC Class Codes: H03G 3/001 Digital control of analog signals
• CPC Class Codes: H03H 11/126 using a single operational amplifier H03H11/1204 takes precedence; parallel-T filters H03H11/1295
• CPC Class Codes: H03H 11/1291 Current or voltage controlled filters
• CPC Class Codes: H03H 11/22 providing two or more phase shifted output signals, e.g. n-phase output
• CPC Class Codes: H03H 11/344 : Duplexers
• CPC Class Codes: H03H 2011/0494 : Complex filters
• CPC Class Codes: H03H 21/0001 : Analogue adaptive filters
• CPC Class Codes: H03H 21/0012 : Digital adaptive filters
• CPC Class Codes: H03H 2210/025 : Capacitor
• CPC Class Codes: H03H 2210/036 : Stepwise
• CPC Class Codes: H03H 7/42 : Networks for transforming balanced signals into unbalanced signals and vice versa, e.g. baluns
• CPC Class Codes: H03J 2200/10 : Tuning of a resonator by means of digitally controlled capacitor bank
• CPC Class Codes: H03L 7/099 : concerning mainly the controlled oscillator of the loop
• CPC Class Codes: H03L 7/18 : using a frequency divider or counter in the loop H03L7/20, H03L7/22 take precedence
• CPC Class Codes: H04B 17/104 : of other parameters, e.g. DC offset, delay or propagation times
• CPC Class Codes: H04B 17/14 : of the whole transmission and reception path, e.g. self-test loop-back
• CPC Class Codes: H04B 17/19 : Self-testing arrangements

Abstract

An exemplary embodiment of the present invention described and shown in the specification and drawings is a transceiver with a receiver, a transmitter, a local oscillator (LO) generator, a controller, and a self-testing unit. All of these components can be packaged for integration into a single IC including components such as filters and inductors. The controller for adaptive programming and calibration of the receiver, transmitter and LO generator. The self-testing unit generates is used to determine the gain, frequency characteristics, selectivity, noise floor, and distortion behavior of the receiver, transmitter and LO generator. It is emphasized that this abstract is provided to comply with the rules requiring an abstract which will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or the meaning of the claims.

Claims

1-81. -81. (canceled)

82. A single integrated circuit chip of a wireless communications device, comprising:

receiver circuitry that comprises

a plurality of cascaded filters; and

a bypass circuit operatively coupled across at least one of the cascaded filters,

wherein each of the cascaded filters comprises a first amplifier and a second amplifier,

wherein the first amplifier and the second amplifier comprise a feedback loop,

wherein the feedback loop comprises a feedback resistor and feedback capacitor,

wherein the feedback resistor and the feedback capacitor are operatively coupled in parallel, and

wherein the wireless communication device supports direct sequence spread spectrum modulation.

83. The single integrated circuit chip according to claim 82, wherein at least one of the feedback resistors is programmable.

84. The single integrated circuit chip according to claim 83,

wherein the at least one programmable feedback resistor comprises a plurality of resistors operatively coupled in series, and

wherein the plurality of resistors each has a switch operatively coupled thereacross.

85. The single integrated circuit chip according to claim 82, wherein at least one of the feedback capacitors is programmable.

86. The single integrated circuit chip according to claim 85,

wherein the at least one programmable feedback capacitor comprises a plurality of capacitors operatively coupled in parallel, and

wherein the plurality of capacitors each has a switch operatively coupled thereacross.

87. The single integrated circuit chip according to claim 82,

wherein the cascaded filters each comprises a first cross coupled resistor and a second cross coupled resistor,

wherein the first cross coupled resistor is operatively coupled between an output of the first amplifier and an input of the second amplifier, and

wherein the second cross coupled resistor is operatively coupled between an output of the second amplifier and an input of the first amplifier.

88. The single integrated circuit chip according to claim 87,

wherein the cascaded filters each comprises a first input resistor and a second input resistor,

wherein the first input resistor is operatively coupled to the input of the first amplifier, and

wherein the second input resistor is operatively coupled to the input of the second amplifier.

89. The single integrated circuit chip according to claim 87,

wherein the cascaded filters each comprises an input capacitor that has a first end and a second end,

wherein the first end of the input capacitor is operatively coupled to the first input resistor, and

wherein the second end of the input capacitor is operatively coupled to the second input resistor.

90. The single integrated circuit chip according to claim 82, wherein the receiver circuitry is part of a single integrated circuit transceiver chip of the wireless communications device.

91. The single integrated circuit chip according to claim 90, wherein the wireless communications device supports orthogonal frequency division multiplexing.

92. The single integrated circuit chip according to claim 90, wherein the wireless communications device supports frequency hopping.

93. The single integrated circuit chip according to claim 90, wherein the plurality of cascaded filters and the bypass circuit are part of a programmable complex filter.

94. The single integrated circuit chip according to claim 93, wherein the programmable complex filter is tunable.

95. The single integrated circuit chip according to claim 93,

wherein the receiver circuitry comprises a complex mixer, and

wherein the complex mixer is operatively coupled to the programmable complex filter.

96. The single integrated circuit chip according to claim 93, wherein the programmable complex filter is an active complex filter.

97. The single integrated circuit chip according to claim 96, wherein the active complex filter comprises differential amplifiers.

98. The single integrated circuit chip according to claim 82, wherein the receiver circuitry is part of an integrated circuit chip of a transceiver of the wireless communications device.

99. The single integrated circuit chip according to claim 98, wherein the wireless communications device supports orthogonal frequency division multiplexing.

100. The single integrated circuit chip according to claim 98, wherein the wireless communications device supports frequency hopping.

101. The single integrated circuit chip according to claim 98, wherein the plurality of cascaded filters and the bypass circuit are part of a programmable complex filter.

102. The single integrated circuit chip according to claim 101, wherein the programmable complex filter is tunable.

103. The single integrated circuit chip according to claim 101,

wherein the receiver circuitry comprises a complex mixer, and

wherein the complex mixer is operatively coupled to the programmable complex filter.

104. The single integrated circuit chip according to claim 101, wherein the programmable complex filter is an active complex filter.

105. The single integrated circuit chip according to claim 97, wherein the active complex filter comprises differential amplifiers.