HIGH BANDWIDTH, HIGH CAPACITY LOOK-UP TABLE IMPLEMENTATION IN DYNAMIC RANDOM ACCESS MEMORY
First Claim
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1. A packet processor receiving data packets each including a header of a plurality of fields, comprising:
- a data bus;
a dynamic random access memory having a plurality of banks each receiving data from the data bus and providing results on the data bus, each bank storing a look-up table for resolving a field of the header of each data packet; and
a central processing unit receiving the data packets and in accordance with the fields of each data packet generating memory accesses to the banks of the dynamic random access memory.
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Abstract
Fixed-cycle latency accesses to a dynamic random access memory (DRAM) are designed for read and write operations in a packet processor. In one embodiment, the DRAM is partitioned to a number of banks, and the allocation of information to each bank to be stored in the DRAM is matched to the different types of information to be looked up. In one implementation, accesses to the banks can be interleaved, such that the access latencies of the banks can be overlapped through pipelining. Using this arrangement, near 100% bandwidth utilization may be achieved over a burst of read or write accesses.
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Citations
14 Claims
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1. A packet processor receiving data packets each including a header of a plurality of fields, comprising:
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a data bus; a dynamic random access memory having a plurality of banks each receiving data from the data bus and providing results on the data bus, each bank storing a look-up table for resolving a field of the header of each data packet; and a central processing unit receiving the data packets and in accordance with the fields of each data packet generating memory accesses to the banks of the dynamic random access memory. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. A method for processing a data packet, comprising:
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providing a dynamic random access memory having a plurality of banks each receiving data from a data bus and providing results on the data bus; storing in each bank a look-up table, each look-up table being provided to resolve a field of a header of the data packet; and receiving the data packet and, in accordance with the fields of the data packet, generating memory accesses to banks of the the dynamic random access memory. - View Dependent Claims (9, 10, 11, 12, 13, 14)
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Specification