Electric Component

• US 20070290235A1
• Filed: 11/26/2004
• Published: 12/20/2007
• Est. Priority Date: 11/26/2004
• Status: Active Grant

• Current Assignee: Tdk-Micronas Gmbh (TDK Corporation)
• Original Assignee: Micronas Gmbh (TDK Corporation)
• Inventors: Freund, Ingo, Lehmann, Mirko
• Granted Patent: US 7,777,283 B2
• Time in Patent Office: Days
• US Class Current: 257/253
• CPC Class Codes: G01N 27/4148 Integrated circuits therefor, e.g. fabricated by CMOS processing CMOS processing per se H01L21/82

Abstract

An electric component comprising a sensor and/or actuator chip with a substrate on which a passivating layer and a sensor and/or actuator structure consisting of an active surface area is arranged. The chip is surrounded by an encapsulation having an opening which forms an access to the at least one active surface area. A layer stack is arranged on the substrate, said stack of layers comprising from the passivating layer to the substrate at least one first strip conductor layer, a first electric insulating layer, a second strip conductor layer and a second electric insulating layer. The first conductor strip layer is fully arranged outside the area of the chip covered by the opening. At least one conductor strip of the second conductor strip layer is connected to the sensor and/or actuator structure.

Claims

1. An electrical component having a sensor and/or actuator chip, in particular a CMOS chip, that has a substrate on which a passivation layer and at least one structure that has at least one active surface area for a sensor and/or actuator is located, and the chip is surrounded by an encapsulation that has at least one opening that forms an access to the active surface area of which at least one is present, and to the passivation layers, and in the opening the chip has an interaction surface that extends, at least in some areas, over the passivation layer and the active surface area and that in the operating position is in contact with a liquid or viscous medium, and a first electrical insulation layer is provided between the passivation layer and the substrates, and a first conductor track layer that has at least one area that is configured as a conductor track is located in some areas between the passivation layer and the first insulation layer, and a second electric insulation layer is provided between the first insulation layer and the substrates, and a second conductor track layer that has at least one area that is configured as a conductor track is located between the first insulation layer and the second insulation layer, and at least one of the conductor tracks is connected to the sensor and/or actuator structure, wherein at least the areas of the first conductor track layer that carry an electrical potential are located completely outside of the area of the chip covered by the interaction surface.

4. The electrical component of claim 1, wherein the second conductor track layer has at least two laterally separated electrically conductive layer areas, at the least in the area of the second conductor track layer covered by the interaction surface, the distances between the laterally adjacent areas of this conductor track layer in each case are less than 1.2 times the thickness of the first conductor track layer, in particular less than 1.1 times, in some cases less than 1.0 times, possibly less than 0.9 times, and preferably less than 0.8 times this thickness.

5. The electrical component of claim 1, wherein the first conductor track layer is comprised of metal, preferably aluminum, and the second conductor track layer is comprised of a doped semiconductor material, preferably polysilicon.

6. The electrical component of claim 1, wherein a structure for an electronic circuit, in particular a structure for an evaluation device, is located on the substrate outside of the area covered by the openings, and said structure is electrically connected to the sensor and/or actuator structure by means of at least one of the conductor track layers).

2. An electrical component having a sensor and/or actuator chip, in particular a CMOS chip, that has a substrate on which a passivation layer and at least one structure that has at least one active surface area for a sensor and/or actuator is located, and the chip is surrounded by an encapsulation that has at least one opening that forms an access to the active surface area, of which at least one is present, and to the passivation layer, and in the opening the chip has an interaction surface that extends, at least in some areas, over the passivation layer and the active surface area and that in the operating position is in contact with a liquid or viscous medium, and a first electrical insulation layer is provided between the passivation layer and the substrate, and a first conductor track layer that has at least two laterally separated electrically conductive layer areas is is located in some areas between the passivation layer and the first insulation layer, and a second electrical insulation layer is provided between the first insulation layer and the substrates, and a second conductor track layer is located between the first insulation layer and the second insulation layer, wherein at least in the area of the first conductor track layer that is covered by the interaction surface the distances between the laterally adjacent, electrically conductive layer areas in each case are smaller that 1.2 times the thickness of this conductor track layers.

3. The electrical component of claim 2, wherein, at the least in the area of the first conductor track layer covered by the interaction surface, the distances between the laterally adjacent areas of this conductor track layer in each case are less than 1.1 times the thickness of the first conductor track layer, in particular less than 1.0 times, possibly less than 0.9 times, and preferably less than 0.8 times this thickness.

7. The electrical component of claim 2, wherein the second conductor track layer has at least two laterally separated electrically conductive layer areas, at the least in the area of the second conductor track layer covered by the interaction surface, the distances between the laterally adjacent areas of this conductor track layer in each case are less than 1.2 times the thickness of the first conductor track layer, in particular less than 1.1 times, in some cases less than 1.0 times, possibly less than 0.9 times, and preferably less than 0.8 times this thickness.

8. The electrical component of claim 2, wherein the first conductor track layer is comprised of metal, preferably aluminum, and the second conductor track layer is comprised of a doped semiconductor material, preferably polysilicon.

9. The electrical component of claim 2, wherein a structure for an electronic circuit, in particular a structure for an evaluation device, is located on the substrate outside of the area covered by the opening, and said structure is electrically connected to the sensor and/or actuator structure by means of at least one of the conductor track layers.