METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE INCLUDING AN IMPURITY-DOPED SILICON FILM

• US 20070290259A1
• Filed: 06/19/2007
• Published: 12/20/2007
• Est. Priority Date: 06/20/2006
• Status: Active Grant

• Current Assignee: Longitude Semiconductor S.à r.l. (Vector Capital Corporation)
• Original Assignee: Elpida Memory Incorporated (Micron Technology, Inc.)
• Inventors: SAINO, Kanta
• Granted Patent: US 8,735,230 B2
• Time in Patent Office: Days
• US Class Current: 257/330
• CPC Class Codes: H01L 21/28035 the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities H01L21/28105 takes precedence
• CPC Class Codes: H01L 29/4236 within a trench, e.g. trench gate electrode, groove gate electrode
• CPC Class Codes: H01L 29/66621 using etching to form a recess at the gate location etching of semiconductor bodies H01L21/302
• CPC Class Codes: H10B 12/053 the transistor being at least partially in a trench in the substrate vertical transistor in combination with a capacitor formed in a substrate trench H10B12/0383
• CPC Class Codes: H10B 12/09 with simultaneous manufacture of the peripheral circuit region and memory cells

Abstract

A process for manufacturing a semiconductor device consecutively includes forming a recess in the surface region of a silicon substrate, forming a gate insulation film on the surface of the recess, depositing a silicon electrode film including an oxygen-mixed layer extending parallel to the surface of the recess, injecting impurities into silicon the electrode film 17, and heat-treating the silicon electrode film to diffuse impurities.

Claims

1. A method for manufacturing a semiconductor device including a recessed-channel MOSFET, comprising:

forming a recess in a surface region of a semiconductor substrate;

forming a gate insulation film on a surface of said semiconductor substrate;

forming a silicon electrode film on said gate insulation film, said silicon electrode film including therein an oxygen-mixed layer substantially parallel to a surface of said recess;

injecting impurities in said silicon electrode film; and

heat-treating said silicon electrode film to diffuse said impurities, in the order as recited above.

2. The method according to claim 1, wherein a distance between said surface of said recess and said oxygen-mixed layer is equal to or less than half a minimum width of said recess.

3. The method according to claim 1, wherein said impurities are of n-type.

4. The method according to claim 1, wherein said impurities are of p-type.

5. The method according to claim 1, wherein said heat-treating crystallizes said silicon electrode film and forms a crystal grain interface, with said oxygen-mixed layer as a boundary.

6. A semiconductor device comprising:

a semiconductor substrate including a recess formed in a surface region of said semiconductor substrate; and

an impurity-doped silicon film formed in said recess, wherein said impurity-doped silicon film includes a crystal grain interface extending substantially parallel to a surface of said recess.

7. The semiconductor device according to claim 6, wherein said impurity-doped silicon film includes oxygen in a vicinity of said crystal grain interface.

8. The semiconductor device according to claim 6, wherein a distance between said crystal grain interface and said surface of said recess is equal to or smaller than half a minimum width of said recess.

9. The semiconductor device according to claim 6, wherein said impurity-doped silicon film configures at least a part of a gate electrode of a recessed-channel MOSFET.