Convolution filtering in a graphics processor
First Claim
1. An apparatus configured to receive a command to perform convolution filtering on a grid of pixels, to partition the grid into multiple sections, and to generate multiple instructions for the multiple sections, each instruction performing convolution computation on at least one pixel in one section.
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Abstract
Techniques for performing convolution filtering using hardware normally available in a graphics processor are described. Convolution filtering of an arbitrary H×W grid of pixels is achieved by partitioning the grid into smaller sections, performing computation for each section, and combining the intermediate results for all sections to obtain a final result. In one design, a command to perform convolution filtering on a grid of pixels with a kernel of coefficients is received, e.g., from a graphics application. The grid is partitioned into multiple sections, where each section may be 2×2 or smaller. Multiple instructions are generated for the multiple sections, with each instruction performing convolution computation on at least one pixel in one section. Each instruction may include pixel position information and applicable kernel coefficients. Instructions to combine the intermediate results from the multiple instructions are also generated.
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Citations
37 Claims
- 1. An apparatus configured to receive a command to perform convolution filtering on a grid of pixels, to partition the grid into multiple sections, and to generate multiple instructions for the multiple sections, each instruction performing convolution computation on at least one pixel in one section.
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7. A method comprising:
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receiving a command to perform convolution filtering on a grid of pixels; partitioning the grid into multiple sections; generating multiple instructions for the multiple sections, each instruction performing convolution computation on at least one pixel in one section; and generating instructions to combine intermediate results from the multiple instructions for the multiple sections. - View Dependent Claims (8, 9)
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10. An apparatus comprising:
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means for receiving a command to perform convolution filtering on a grid of pixels; means for partitioning the grid into multiple sections; means for generating multiple instructions for the multiple sections, each instruction performing convolution computation on at least one pixel in one section; and means for generating instructions to combine intermediate results from the multiple instructions for the multiple sections. - View Dependent Claims (11, 12)
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13. A processor readable media for storing instructions operable to:
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receive a command to perform convolution filtering on a grid of pixels; partition the grid into multiple sections; generate multiple instructions for the multiple sections, each instruction performing convolution computation on at least one pixel in one section; and generate instructions to combine intermediate results from the multiple instructions for the multiple sections. - View Dependent Claims (14, 15)
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16. An graphics processor comprising:
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a first processing unit configured to receive a set of instructions for convolution filtering of a grid of pixels, to dispatch a plurality of instructions in the set, to receive intermediate results for the dispatched instructions, and to combine the intermediate results to generate a final result for the convolution filtering of the grid of pixels; and a second processing unit configured to receive the instructions dispatched by the shader core, to perform computation on at least one pixel in the grid for each instruction, and to provide an intermediate result for each instruction. - View Dependent Claims (17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30)
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31. A method comprising:
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receiving a set of instructions for convolution filtering of a grid of pixels; dispatching a plurality of instructions in the set; performing computation on at least one pixel in the grid for each dispatched instruction to obtain an intermediate result for the dispatched instruction; and combining intermediate results for the plurality of dispatched instructions to generate a final result. - View Dependent Claims (32, 33)
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- 34. An apparatus configured to receive a command to perform convolution filtering on a grid of pixels with a kernel of coefficients in accordance with one of multiple modes comprising a first mode and a second mode, to multiply the pixels in the grids with closest coefficients in the kernel if the first mode is selected, and to multiply the pixels in the grids with interpolated coefficients derived from the coefficients in the kernel if the second mode is selected.
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37. A method comprising:
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receiving a command to perform convolution filtering on a grid of pixels with a kernel of coefficients in accordance with one of multiple modes comprising a first mode and a second mode; multiplying the pixels in the grids with closest coefficients in the kernel if the first mode is selected; and multiplying the pixels in the grids with interpolated coefficients derived from the coefficients in the kernel if the second mode is selected.
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Specification