DIELECTRIC DEPOSITION AND ETCH BACK PROCESSES FOR BOTTOM UP GAPFILL

• US 20070298585A1
• Filed: 06/20/2007
• Published: 12/27/2007
• Est. Priority Date: 06/22/2006
• Status: Active Grant

• Current Assignee: Applied Materials Incorporated
• Original Assignee: Applied Materials Incorporated
• Inventors: Yieh, Ellie, Lubomirsky, Dmitry, Nemani, Srinivas
• Granted Patent: US 8,232,176 B2
• Time in Patent Office: Days
• US Class Current: 438/435
• CPC Class Codes: H01L 21/76229 Concurrent filling of a plurality of trenches having a different trench shape or dimension, e.g. rectangular and V-shaped trenches, wide and narrow trenches, shallow and deep trenches

Abstract

Methods to reduce film cracking in a dielectric layer are described. The methods may include the steps of depositing a first dielectric film on a substrate and removing a top portion of the first dielectric film by performing an etch on the film. The methods may also include depositing a second dielectric film over the etched first film, and removing a top portion of the second dielectric film. In addition, the methods may include annealing the first and second dielectric films to form the dielectric layer, where the removal of the top portions from the first and the second dielectric films reduces a stress level in the dielectric layer.

Claims

1. A method to reduce film cracking in a dielectric layer, the method comprising:

depositing a first dielectric film on a substrate;

removing a top portion of the first dielectric film by performing an etch on the film;

depositing a second dielectric film over the etched first film;

removing a top portion of the second dielectric film; and

annealing the first and second dielectric films to form the dielectric layer, wherein the removal of the top portions from the first and the second dielectric films reduces a stress level in the dielectric layer.

2. The method of claim 1, wherein the depositing of the first and the second dielectric films comprises:

mixing an organo-silicon precursor and atomic oxygen in a deposition chamber; and

reacting the precursors to form a silicon dioxde layer on the substrate.

3. The method of claim 2, wherein the atomic oxygen is generated outside the deposition chamber.

4. The method of claim 2, wherein the atomic oxygen is formed by:

forming a plasma from a gas mixture comprising argon; and

introducing an oxygen precursor to the plasma, wherein the oxygen precursor dissociates to form the atomic oxygen.

5. The method of claim 4, wherein the oxygen precursor is selected from the group consisting of molecular oxygen, ozone, nitrogen dioxide (NO₂), nitrous oxide (N₂O), and water.

6. The method of claim 2, wherein the atomic oxygen is formed by:

introducing an oxygen precursor into a photodissociation chamber; and

exposing the oxygen precursor to ultraviolet light, wherein the ultraviolet light dissociates the oxygen precursor to form atomic oxygen.

7. The method of claim 2, wherein the organo-silicon precursor comprises dimethylsilane, trimethylsilane, tetramethylsilane, diethylsilane, trimethoxysilane (TriMOS), tetramethylorthosilicate (TMOS), triethoxysilane (TriEOS), tetraethylorthosilicate (TEOS), octamethyltrisiloxane (OMTS), octamethylcyclotetrasiloxane (OMCTS), tetramethylcyclotetrasiloxane (TOMCATS), DMDMOS, DEMS, methyl triethoxysilane (MTES), phenyldimethylsilane, or phenylsilane.

8. The method of claim 1, wherein the etch of the first dielectric film is performed as a wet etch or a dry etch.

9. The method of claim 1, wherein the etch of the first dielectric film is a dry etch performed by exposing the film to a etch gas comprising a fluorine compound.

10. The method of claim 9, wherein the etch gas comprises nitrogen tri-fluoride or an organo-fluorine compound.

11. The method of claim 10, wherein the organo-fluorine compound comprises CF₄, C₂F₆, or C₃F₈.

12. The method of claim 1, wherein the etch of the first dielectric film is a wet etch performed by exposing the film to an acidic solution.

13. The method of claim 12, wherein the acidic solution comprises hydrofluoric acid, hydrochloric acid, phosphoric acid, nitric acid, or sulfuric acid.

14. The method of claim 12, wherein the acidic solution further comprises hydrogen peroxide.

15. The method of claim 1, wherein the etch of the first dielectric film is a wet etch performed by exposing the film to an basic solution.

16. The method of claim 15, wherein the basic solution comprises ammonium hydroxide.

17. The method of claim 16, wherein the basic solution further comprises hydrogen peroxide.

18. The method of claim 8, wherein the etch is a wet etch, and wherein the deposition of the first film and the wet etch of said first film are performed in the same process chamber.

19. The method of claim 8, wherein the etch is a wet etch performed in a different chamber then that used for the deposition of the first dielectric film.

20. The method of claim 1, wherein the first dielectric film has an initial depth of about 1 nm to about 100 nm.

21. The method of claim 1, wherein the method comprises annealing the first dielectric film before the removal of the top portion of the first film.

22. The method of claim 1, wherein the method comprises annealing the first dielectric film before depositing the second dielectric film.

23. A method filling a trench with a dielectric material, the method comprising:

filling the trench with a film of the dielectric material, wherein the dielectric film is formed by;

combining a first fluid stream comprising atomic oxygen with a second fluid stream comprising a silicon-containing precursor, and

reacting the atomic oxygen and the silicon-containing precursor to form the dielectric film in the trench;

removing a top portion of the dielectric film by etching the film; and

annealing the etched film.

24. The method of claim 23, wherein the initially deposited dielectric film extends over a top of the trench.

25. The method of claim 24, wherein the dielectric film is etched back below the top of the trench.

26. The method of claim 25, wherein a capping layer is deposited on the etched back dielectric film.

27. The method of claim 26, wherein the capping layer comprises the same dielectric material as the dielectric film.

28. The method of claim 23, wherein the etching of the film is performed as a wet etch or a dry etch.

29. The method of claim 23, wherein the etching of the film is a dry etch performed by exposing the film to a etch gas comprising a fluorine compound.

30. A method to reduce film cracking in a dielectric layer, the method comprising:

depositing a first dielectric film on a substrate;

performing a first anneal on the first film;

removing a top portion of the annealed first film by performing a first etch on the first film;

depositing a second dielectric film over the etched first film;

removing a top portion of the second dielectric film by performing a second etch on the second film; and

performing a second anneal of the first and second dielectric films and forming the dielectric layer, wherein the removal of the top portions from the first and the second dielectric films reduces a stress level in the dielectric layer.

31. The method of claim 30, wherein the first anneal comprises heating the first film to a temperature up to about 600°

C.

32. The method of claim 30, wherein the first anneal is a multistage anneal that comprises the stages of:

heating the first film at a first temperature of up to about 50°

C. for a first period of time;

heating the first film at a second temperature of about 50°

C. to about 100°

C. for a second period of time; and

heating the first film at a third temperature of more than 100°

C. to about 600°

C. for a third period of time.

33. The method of claim 32, wherein the first period of time comprises about 1 hour, and the second period of time comprises about 30 minutes.

34. The method of claim 32, wherein the third period of time comprises about 30 minutes to about 1 hour.

35. The method of claim 30, wherein the first anneal comprises irradiating the first film with UV light.

36. The method of claim 30, wherein the first anneal comprises exposing the first film to an inert plasma.

37. The method of claim 30, wherein the first anneal comprises exposing the first film to an electron beam.

38. The method of claim 30, wherein the second anneal comprises heating the first and second layers in a dry, non-reactive gas atmosphere to a temperature of about 800°

C. or more.

39. The method of claim 38, wherein the dry, non-reactive gas atmosphere comprises nitrogen (N₂).

40. The method of claim 30, wherein the first etch is performed as a wet etch or a dry etch.

41. The method of claim 30, wherein the second etch is performed as a wet etch or a dry etch.

42. The method of claim 30, wherein the method further comprises depositing a third dielectric film over the first and second films;

and

removing a top portion of the third dielectric film.

43. The method of claim 42, wherein the method further comprises annealing the first second and third dielectric films to form the dielectric layer, wherein the removal of the top portions of the first, second and third dielectric films reduced the stress level in the dielectric layer.

44. A multistep deposition method for filling a gap on a semiconductor substrate with dielectric material, the method comprising:

depositing a first dielectric film in a bottom portion of the gap;

annealing the first dielectric film in a first anneal;

depositing a second dielectric film on the annealed first dielectric film; and

annealing the second dielectric film in a second anneal.

45. The multistep deposition of claim 44, wherein the method comprises:

depositing a third dielectric film on the annealed second dielectric film; and

annealing the third dielectric film in a third anneal.

46. The multistep deposition of claim 44, wherein the first anneal comprises a thermal anneal, an e-beam anneal, an ultra-violet light anneal, or a plasma anneal.

47. The multistep deposition of claim 44, wherein the second anneal comprises a thermal anneal, an e-beam anneal, an ultra-violet light anneal, or a plasma anneal.

48. The multistep deposition of claim 44, wherein the first anneal is performed at a lower temperature than the second anneal.

49. The multistep deposition of claim 48, wherein the first anneal is performed at a first temperature up to about 600°

C. and the second anneal is performed at a second temperature up to about 1000°

C.

50. The multistep deposition of claim 44, wherein the method comprises performing a first etch of the annealed first dielectric film before the depositing of the second dielectric film.

51. The multistep deposition of claim 50, wherein the etch removes a top portion of the first dielectric film.

52. The multistep deposition of claim 50, wherein the etch comprises a wet etch or a dry etch.

53. The multistep deposition of claim 50, wherein the etch comprises exposing the film to a etch gas comprising a fluorine compound.

54. The multistep deposition of claim 44, wherein the method comprises performing a second etch of the second dielectric film.