RF POWER AMPLIFIER

• US 20070298736A1
• Filed: 06/18/2007
• Published: 12/27/2007
• Est. Priority Date: 06/19/2006
• Status: Active Grant

• Current Assignee: Renesas Electronics Corporation
• Original Assignee: Renesas Electronics Corporation
• Inventors: Shimizu, Toshihiko, Ohnishi, Masami, Matsumoto, Hidetoshi, Tanaka, Satoshi, Fujioka, Toru
• Granted Patent: US 7,756,494 B2
• Time in Patent Office: Days
• US Class Current: 455/127.3
• CPC Class Codes: H03F 1/02 Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
• CPC Class Codes: H03F 1/0266 by using a signal derived from the input signal
• CPC Class Codes: H03F 1/0277 Selecting one or more amplifiers from a plurality of amplifiers
• CPC Class Codes: H03F 1/0288 using a main and one or several auxiliary peaking amplifiers whereby the load is connected to the main amplifier using an impedance inverter, e.g. Doherty amplifiers
• CPC Class Codes: H03F 2200/108 A coil being added in the drain circuit of a FET amplifier stage, e.g. for noise reducing purposes
• CPC Class Codes: H03F 2200/181 A coil being added in the gate circuit of a FET amplifier stage, e.g. for noise reducing purposes
• CPC Class Codes: H03F 2200/432 Two or more amplifiers of different type are coupled in parallel at the input or output, e.g. a class D and a linear amplifier, a class B and a class A amplifier
• CPC Class Codes: H03F 2200/451 the amplifier being a radio frequency amplifier
• CPC Class Codes: H03F 2200/456 A scaled replica of a transistor being present in an amplifier
• CPC Class Codes: H03F 3/195 in integrated circuits
• CPC Class Codes: H03F 3/211 using a combination of several amplifiers H03F3/60 takes precedence
• CPC Class Codes: H03F 3/24 of transmitter output stages
• CPC Class Codes: H03G 3/004 Control by varying the supply voltage
• CPC Class Codes: H04B 2001/045 with means for improving efficiency

Abstract

The RF power amplifier includes first and second amplifiers Q1 and Q2 as final-stage amplification power devices connected in parallel between an input terminal RF_In and an output terminal RF_Out. The amplifiers Q1 and Q2 are formed on one semiconductor chip. The first bias voltage Vg1 of the amplifier Q1 is set to be higher than the second bias voltage Vg2 of the amplifier Q2 so that the amplifier Q1 is operational between Class B and AB, and Q2 is operational in Class C. The first effective device size Wgq1 of the amplifier Q1 is intentionally set to be smaller than the second effective device size Wgq2 of the amplifier Q2 beyond a range of a manufacturing error of the semiconductor chip. An RF power amplifier that exhibits a high power-added efficiency characteristic regardless of whether the output power is High or Low can be materialized.

Claims

1. An RF power amplifier comprising:

a first amplification device; and

a second amplification device;

wherein the first and second amplification devices are formed on a common semiconductor chip as final-stage amplification power devices connected in parallel between an input terminal and an output terminal,

a first bias voltage of an input terminal of the first amplification device is set to be higher than a second bias voltage of an input terminal of the second amplification device so that the first amplification device is operational in any one of operating classes between Class B with a conduction angle of π

(180°

) and Class AB with a conduction angle of π

(180°

) to 2π

(360°

), and the second amplification device is operational in Class C with a conduction angle below π

(180°

), and

a first effective device size of the first amplification device is intentionally set to be smaller than a second effective device size of the second amplification device beyond a range of a manufacturing error of the semiconductor chip.

2. The RF power amplifier of claim 1, wherein a first source voltage is supplied to an output electrode of the first amplification device through a first load device,

a second source voltage is supplied to an output electrode of the second amplification device through a second load device, and

a power supply circuit works so that a level of the first source voltage reduces in response to a reduction in level of an output power of the RF power amplifier.

3. The RF power amplifier of claim 1, wherein a first source voltage is supplied to an output electrode of the first amplification device through a first load device,

a second source voltage is supplied to an output electrode of the second amplification device through a second load device, and

a power supply circuit works so that a level of the second source voltage rises in response to a rise in level of an output power of the RF power amplifier.

4. The RF power amplifier of claim 1, wherein a ¼

-wavelength output line is connected between the output terminal and an output electrode of the first amplification device, and

a ¼

-wavelength input line is connected between an input electrode of the second amplification device and the input terminal, whereby the first and second amplification devices work in accordance with Doherty system.

5. The RF power amplifier of claim 2, further comprising RF drive-and-amplification stages for driving the final-stage amplification power devices,

wherein the power supply circuit is supplied with an external source voltage, and supplies the first and second amplification devices with first and second source voltages controlled in response to a level of a transmission level-specifying signal respectively.

6. The RF power amplifier of claim 5, wherein the first source voltage is supplied to the output electrode of the first amplification device through the first load device,

the second source voltage is supplied to an output electrode of the second amplification device through the second load device, and

the power supply circuit works so that the level of the first source voltage reduces in response to reduction in level of the output power of the RF power amplifier.

7. The RF power amplifier of claim 5, wherein the first source voltage is supplied to the output electrode of the first amplification device through the first load device,

the second source voltage is supplied to the output electrode of the second amplification device through the second load device, and

the power supply circuit works so that the level of the second source voltage rises in response to rise in the level of the output power of the RF power amplifier.

8. The RF power amplifier of claim 5, wherein the power supply circuit includes a DC-DC converter composed of a switching regulator.

9. The RF power amplifier of claim 5, further comprising:

a power detector for detecting a level in connection with the output power from the output terminal;

an error amplifier for producing an automatic power control signal when being supplied with the transmission level-specifying signal and a power detection signal of the power detector;

driving input bias circuits for controlling the level of driving input bias voltages of the RF drive-and-amplification stages in response to the automatic power control signal produced by the error amplifier; and

final-stage input bias circuits for controlling the levels of final-stage input bias voltages of the first and second amplification devices as the final-stage amplification power devices in response to the automatic power control signal produced by the error amplifier.

10. The RF power amplifier of claim 1, wherein the first and second first amplification devices are each a field effect transistor.

11. The RF power amplifier of claim 10, wherein the field effect transistor is an LDMOS.

12. The RF power amplifier of claim 1, wherein the first and second amplification devices are each a bipolar transistor.

13. The RF power amplifier of claim 12, wherein the bipolar transistor is of a heterojunction type.

14. The RF power amplifier of claim 1, wherein the first effective device size of the first amplification device is set to be substantially half of the second effective device size of the second amplification device.

15. The RF power amplifier of claim 9, wherein the semiconductor chip with the first and second amplification devices formed thereon, the power detector and the error amplifier, and the DC-DC converter are incorporated in an RF power module package.

16. An RF power amplifier comprising:

a first amplification device;

a second amplification device; and

a third amplification device,

wherein the first to third amplification devices are formed on a common semiconductor chip as final-stage amplification power devices connected in parallel between an input terminal and an output terminal,

an input electrode of the third amplification device is connected with an input electrode of the first amplification device through a switching device,

when an RF power output is at Low level, the switching device is controlled to be in OFF state, whereby the third amplification device is controlled to be in OFF state,

when the RF power output is at Low level, a first bias voltage of an input terminal of the first amplification device is set to be higher than a second bias voltage of an input terminal of the second amplification device so that the first amplification device is operational in any one of operating classes between Class B with a conduction angle of π

(180°

) and Class AB with a conduction angle of π

(180°

) to 2π

(360°

), and the second amplification device is operational in Class C with a conduction angle below π

(180°

), and

when the RF power output is at High level, the switching device is controlled to be in ON state,

when the RF power output is at High level, (1) a first bias voltage of an input terminal of the first amplification device and an input terminal of the third amplification device, and (2) the second bias voltage of the input terminal of the second amplification device are set so that the first and third amplification devices are operational in any one of operating classes between Class B with a conduction angle of π

(180°

) and Class AB with a conduction angle of π

(180°

) to 2π

(360°

), and the second amplification device is also operational in any one of operating classes between Class B with a conduction angle of π

(180°

) and Class AB with a conduction angle of π

(180°

) to 2π

(360°

),

a first effective device size of the first amplification device and a third effective device size of the third amplification device are set to be substantially identical to each other, but intentionally smaller than a second effective device size of the second amplification device beyond a range of a manufacturing error of the semiconductor chip.

17. The RF power amplifier of claim 16, further comprising:

RF drive-and-amplification stages for driving the final-stage amplification power devices; and

a power supply circuit which is supplied with an external source voltage, and which supplies a first source voltage controlled in response to a level of a transmission level-specifying signal to the first and third amplification devices, and supplies a controlled second source voltage to the second amplification device.

18. The RF power amplifier of claim 17, wherein the first source voltage is supplied to an output electrode of the first amplification device and an output electrode of the third amplification device through a first load device,

the second source voltage is supplied to an output electrode of the second amplification device through a second load device, and

the power supply circuit works so that a level of the first source voltage reduces in response to reduction in level of an output power of the RF power amplifier.

19. The RF power amplifier of claim 17, wherein the first source voltage is supplied to an output electrode of the first amplification device and an output electrode of the third amplification device through a first load device,

the second source voltage is supplied to an output electrode of the second amplification device through a second load device, and

the power supply circuit works so that a level of the second source voltage rises in response to rise of an output power of the RF power amplifier.

20. The RF power amplifier of claim 17, wherein the power supply circuit includes a DC-DC converter composed of a switching regulator.

21. The RF power amplifier of claim 18, further comprising:

a power detector for detecting a level in connection with the output power from the output terminal;

an error amplifier for producing an automatic power control signal when being supplied with the transmission level-specifying signal and a power detection signal of the power detector;

driving input bias circuits for controlling the level of driving input bias voltages of the RF drive-and-amplification stages in response to the automatic power control signal produced by the error amplifier; and

final-stage input bias circuits for controlling the levels of final-stage input bias voltages of the first to third amplification devices as the final-stage amplification power devices in response to the automatic power control signal produced by the error amplifier.

22. The RF power amplifier of claim 16, wherein the switching device is a MEMS switch formed on the semiconductor chip.

23. The RF power amplifier of claim 16, wherein first to third amplification devices are each a field effect transistor.

24. The RF power amplifier of claim 23, wherein the field effect transistor is an LDMOS.

25. The RF power amplifier of claim 16, wherein the first to third amplification devices are each a bipolar transistor.

26. The RF power amplifier of claim 25, wherein the bipolar transistor is of a heterojunction type.

27. The RF power amplifier of claim 16, wherein the first effective device size of the first amplification device and the third effective device size of the third amplification device are set to be substantially half of the second effective device size of the second amplification device.

28. The RF power amplifier of claim 21, wherein the semiconductor chip with the first to third amplification devices formed thereon, the power detector and the error amplifier, and the DC-DC converter are incorporated in an RF power module package.

29. A high-frequency power amplifier comprising:

a plurality of power amplifiers disposed in parallel; and

a bias control circuit which determines an operation mode depending on a method of modulating an input signal and individually controls biases of the power amplifiers depending on the determined operation mode,

wherein the operation mode comprises a linear amplification mode for execution of linear amplification, and a nonlinear amplification mode for execution of nonlinear amplification, and

the bias control circuit makes biases of the power amplifiers substantially equal when the operation mode is the linear amplification mode, and makes the biases of the power amplifiers different from each other when the operation mode is the nonlinear amplification mode.

30. The high-frequency power amplifier of claim 29, wherein the bias control circuit sets biases of the power amplifiers so that the power amplifiers are operational in any one of operating classes between Class A and B when the input signal requires linear amplification, and

the bias control circuit sets the bias of at least one power amplifier so that the at least one power amplifier is operational in any one of operating classes between Class A and B, and sets the biases of the remaining power amplifiers so that the remaining power amplifier are operational in any one of operating classes between Class B and C when the input signal requires nonlinear amplification.

31. The high-frequency power amplifier of claim 29, wherein a line for the input signal is adapted for differential input.

32. The high-frequency power amplifier of claim 29, wherein a piece of information for controlling activation and deactivation of an antenna switch for cutting a line to an antenna is superposed on an output signal from the power amplifier.

33. The high-frequency power amplifier of claim 29, further comprising:

a signal distributing part for supplying the input signal to the power amplifiers; and

a signal synthesizing part for synthesizing high-frequency signals amplified by the power amplifiers.

34. The high-frequency power amplifier of claim 33, wherein the signal distributing part includes a first circuit which makes a phase difference between signals resulting from distribution by the signal distributing part 90 degrees, and

the signal synthesizing part includes a second circuit which makes the phase difference between the signals subjected to amplification by the power amplifiers 0 degree.

35. The high-frequency power amplifier of claim 34, wherein the first and second circuits are each composed of a distributed parameter line.

36. The high-frequency power amplifier of claim 34, wherein the first and second circuits are each composed of a lumped-parameter device.

37. The high-frequency power amplifier of claim 29, wherein the high-frequency power amplifier is a multistage amplifier including a plurality of amplifier stages, each composed of a group of power amplifiers disposed in parallel, and

the plurality of amplifier stages are connected in series.

38. The high-frequency power amplifier of claim 29, further comprising

a preceding stage amplifier having an output terminal connected to an input of the power amplifier,

wherein the preceding stage amplifier is composed of one of an independent power amplifier and a set of independent power amplifiers connected in series, and

the power amplifiers disposed in parallel constitutes a multistage amplifier together with the preceding stage amplifier, and works as a final stage of the multistage amplifier.

39. The high-frequency power amplifier of claim 37, wherein the bias control circuit controls only a final stage of the multistage amplifier in bias.

40. The high-frequency power amplifier of claim 37, wherein the bias control circuit controls all stages of first to final stages of the multistage amplifier in bias.

41. The high-frequency power amplifier of claim 29, wherein the power amplifiers and bias control circuit are formed on a monolithic board.

42. A high-frequency power amplifier supporting a multimode, comprising a plurality of power amplifiers connected in parallel,

wherein the power amplifiers are individually controlled in bias depending on a method of modulating an input signal,

the power amplifiers are switched to a linear amplification mode or nonlinear amplification mode based on information concerning a modulation method, use of which will be started, and

control operations are performed so that characteristic curves of power gain, power-added efficiency and phase difference are made continuous, without switching between the linear amplification mode and the nonlinear amplification mode depending on the amount of input power.

43. A high-frequency power amplifier supporting a multimode of claim 42, wherein biases of the power amplifiers are made substantially equal when the modulation method requires the linear amplification mode, and

biases of the power amplifiers are made different when the modulation method requires the nonlinear amplification mode.

44. A transmitter-receiver comprising:

a transmitter circuit;

a receiver circuit;

an antenna switch; and

an antenna

wherein the transmitter circuit includes a high-frequency power amplifier,

the high-frequency power amplifier includes

a plurality of power amplifiers disposed in parallel, and

a bias control circuit for individually controlling biases of the power amplifiers depending on a method of modulating an input signal.

45. The transmitter-receiver of claim 44, wherein apiece of information for controlling activation and deactivation of an antenna switch for cutting a line to the antenna is superposed on an output signal of the high-frequency power amplifier.