CIRCUIT ARRANGEMENT AND METHOD FOR OPERATING A CIRCUIT ARRANGEMENT

• US 20070300001A1
• Filed: 05/08/2007
• Published: 12/27/2007
• Est. Priority Date: 05/08/2006
• Status: Active Grant

• Current Assignee: Infineon Technologies AG
• Original Assignee: Infineon Technologies AG
• Inventors: Gammel, Berndt, Peters, Christian, Dirscherl, Gerd
• Granted Patent: US 7,657,685 B2
• Time in Patent Office: Days
• US Class Current: 710/301
• CPC Class Codes: G06K 19/07 with integrated circuit chips

Abstract

Circuit arrangement having a chip card controller with connections which can be used to access the chip card controller in accordance with the ISO standard and which are connected or can be connected to an ISO interface. The connections include at least one first connection, which can be connected to the ISO interface via a switch device. In addition, the circuit arrangement includes a further controller with at least one controller connection which is coupled to the switch device such that the first connection of the chip card controller can be connected to the controller connection via the switch device. The switch device can be switched between a first and a second state, where in the first state the first connection of the chip card controller is decoupled from the controller connection and is connected to the ISO interface, and where in the second state the first connection of the chip card controller is decoupled from the ISO interface and is connected to the controller connection.

Claims

1. A circuit arrangement comprising:

a chip card controller comprising connections which can be used to access the chip card controller in accordance with the ISO standard and which can be connected to an ISO interface, the connections comprising at least one first connection which can be connected to the ISO interface via a switch device; and

a further controller comprising at least one controller connection which is coupled to the switch device such that the first connection of the chip card controller can be connected to the controller connection via the switch device,

wherein the switch device can be switched between a first and a second state, where in the first state the first connection of the chip card controller is connected to the ISO interface, and in the second state the first connection of the chip card controller is connected to the controller connection.

2. The circuit arrangement as claimed in claim 1, wherein the chip card controller provides a control signal, on a further connection, which is coupled to the switch device in order to change over the state of the switch device.

3. The circuit arrangement as claimed in claim 1, wherein the at least one first connection comprises a data connection which, in the second state, is connected to a first data controller connection of the further controller.

4. The circuit arrangement as claimed in claim 1, further comprising a clock signal generator which, in the second state, applies an internal clock signal to a first connection of the chip card controller which is in the form of a clock connection.

5. The circuit arrangement as claimed in claim 1, further comprising a supply voltage control configured to provide a controller supply voltage, where the supply voltage control is coupled to the further controller and to a supply potential connection of the chip card controller, to which a supply potential can be applied in accordance with the ISO standard.

6. The circuit arrangement as claimed in claim 5, wherein the controller supply voltage is applied to the further controller when the switch device switches to the second state.

7. The circuit arrangement as claimed in claim 5, wherein the further controller provides a supply voltage control signal which is coupled to the supply voltage control, so that following conclusion of an access action the controller supply voltage is decoupled from the further controller.

8. The circuit arrangement as claimed in claim 5, wherein the controller supply voltage is adjustable.

9. The circuit arrangement as claimed in claim 5, further comprising a first voltage regulation unit, which is provided between the further controller and the supply potential connection of the chip card controller, and is configured to adjust the supply potential for the further controller.

10. The circuit arrangement as claimed in claim 9, wherein the further controller actuates a flash memory unit.

11. The circuit arrangement as claimed in claim 10, further comprising a second voltage regulation unit, which is provided between the flash memory unit and the supply potential connection of the chip card controller, and is configured to adjust the supply potential for the flash memory unit.

12. The circuit arrangement as claimed in claim 1, wherein the further controller actuates a flash memory unit.

13. The circuit arrangement as claimed in claim 1, wherein the further controller actuates an interface.

14. A circuit arrangement comprising:

a chip card controller comprising at least one first connection and second connections, where the connections can be used to access the chip card controller in accordance with the ISO standard;

an ISO interface which is electrically conductively connected to the second connections;

a switch device which can be used to connect at least one first connection to the ISO interface; and

a further controller with at least one controller connection which is coupled to the switch device,

wherein the switch device can be switched between a first and a second state, where in the first state the at least one first connection of the chip card controller is electrically conductively connected to the ISO interface, and where in the second state the at least one first connection of the chip card controller is electrically conductively connected to the at least one controller connection.

15. The circuit arrangement as claimed in claim 14, further comprising a control signal generator configured to provide a control signal which is coupled to the switch device in order to switch the switch device.

16. The circuit arrangement as claimed in claim 15, wherein a first or a second state can be set on a further connection of the chip card controller, which is coupled to the switch device, and the switch device position can be switched when the first state has been set.

17. The circuit arrangement as claimed in claim 15, wherein the further controller is coupled to the control signal generator.

18. The circuit arrangement as claimed in claim 14, wherein in the second state a first connection of the chip card controller which is in a form of a data connection is connected to a first data controller connection of the further controller.

19. The circuit arrangement as claimed in claim 16, wherein the further connection of the chip card controller is connected to a second data controller connection of the further controller, so that data can be transmitted when the second state has been set on the further connection.

20. The circuit arrangement as claimed in claim 14, further comprising a clock signal generator which, in the second state, applies an internal clock signal to the at least one first connection of the chip card controller which is in the form of a clock connection and to a clock connection of the further controller.

21. The circuit arrangement as claimed in claim 14, further comprising a supply voltage control configured to provide a controller supply voltage, where the supply voltage control is coupled to the further controller and to a supply potential connection of the chip card controller, to which a supply potential can be applied in accordance with the ISO standard.

22. The circuit arrangement as claimed in claim 21, wherein the controller supply voltage is applied to the further controller when the switch device switches to the second state.

23. The circuit arrangement as claimed in claim 21, wherein the further controller provides a supply voltage control signal which is coupled to the supply voltage control, so that following conclusion of access actions the controller supply voltage is decoupled from the further controller.

24. The circuit arrangement as claimed in claim 21, wherein the controller supply voltage is adjustable.

25. A method for operating a circuit arrangement comprising a chip card controller and a further controller, wherein the chip card controller has connections which can be used to access the chip card controller in accordance with the ISO standard, and the connections are connected or can be connected to an ISO interface, the method comprising:

switching the circuit arrangement between a first and a second operating state,

wherein the switch to the first operating state comprises decoupling at least one first connection from the connections of the chip card controller from a controller connection of the further controller, and connecting the at least one first connection of the chip card controller to the ISO interface, and

wherein the switch to the second operating state comprises decoupling the at least one first connection of the chip card controller from the ISO interface, and connecting the at least one first connection of the chip card controller to the controller connection.

26. The method as claimed in claim 25, wherein switches between the operating states takes place based on a control signal.

27. The method as claimed in claim 26, wherein the control signal is provided by the chip card controller.

28. The method as claimed in claim 25, wherein the switch between the operating states is initiated by the chip card controller.

29. The method as claimed in claim 28, wherein the initiation comprises setting a first state on a further connection of the chip card controller.

30. The method as claimed in claim 25, further comprising, in the first operating state, providing at least one data transmission link between the chip card controller and the further controller, wherein the link being used for data transmission.

31. The method as claimed in claim 25, wherein the switch to the second operating state comprises coupling an internal clock signal coupled to the further controller to a first connection of the chip card controller, which is in a form of a clock connection.

32. The method as claimed in claim 25, wherein the switch to the second operating state prompts a controller supply voltage to be applied to the further controller.

33. The method as claimed in claim 32, further comprising adjusting the controller supply voltage.

34. The method as claimed in claim 32, further comprising the further controller initiating decoupling of the controller supply voltage.

35. A method for operating a circuit arrangement comprising a chip controller and a further controller, where the chip card controller comprises at least one first connection and second connections, where the connections can be used to access the chip card controller in accordance with the ISO standard, the second connections being connected to an ISO interface, and the at least one first connection being able to be connected to the ISO interface, the method comprising:

switching the circuit arrangement between a first and a second operating state,

wherein the switch to the first operating state comprises electrically decoupling the at least one first connection of the chip card controller from at least one controller connection of the further controller, and electrically connecting it to the ISO interface, and

wherein the switch to the second operating state comprises electrically decoupling the at least one first connection of the chip card controller from the ISO interface, and electrically connecting it to the at least one controller connection.

36. The method as claimed in claim 35, wherein the chip card controller has connections which can be used to switch between the operating states takes place based on a control signal which is provided by the chip card controller.

37. The method as claimed in claim 35, further comprising:

setting a first state on a further connection of the chip card controller; and

switching by the further controller after the first state has been set.

38. The method as claimed in claim 36, further comprising, in the first operating state, providing a data transmission link between the chip card controller and the further controller, said data transmission link being used for bidirectional data transmission.

39. The method as claimed in claim 37, further comprising, in the first operating state, providing two data transmission links between the chip card controller and the further controller, said data transmission links being used for respective unidirectional data transmission.

40. The method as claimed in claim 35, wherein the switch to the second operating state comprises coupling an internal clock signal coupled to the further controller to a first connection of the chip card controller, which is in the form of a clock connection.

41. The method as claimed in claim 35, wherein the switch to the second operating state prompts a controller supply voltage to be applied to the further controller.

42. The method as claimed in claim 41, wherein the further controller initiates decoupling of the controller supply voltage through the provision of a supply voltage control signal.