Power MOS device

• US 20080001220A1
• Filed: 09/11/2007
• Published: 01/03/2008
• Est. Priority Date: 02/11/2005
• Status: Active Grant

• Current Assignee: Alpha & Omega Semiconductor, Inc. (Alpha & Omega Semiconductor, Ltd.)
• Original Assignee: Alpha & Omega Semiconductor, Inc. (Alpha & Omega Semiconductor, Ltd.)
• Inventors: Bhalla, Anup, Li, Tiesheng, Lui, Sik
• Granted Patent: US 7,605,425 B2
• Time in Patent Office: Days
• US Class Current: 257/330
• CPC Class Codes: H01L 29/1095 Body region, i.e. base region, of DMOS transistors or IGBTs cell layout H01L29/0696
• CPC Class Codes: H01L 29/4236 within a trench, e.g. trench gate electrode, groove gate electrode
• CPC Class Codes: H01L 29/456 on silicon
• CPC Class Codes: H01L 29/47 Schottky barrier electrodes H01L29/435 takes precedence
• CPC Class Codes: H01L 29/66727 with a step of recessing the source electrode
• CPC Class Codes: H01L 29/66734 with a step of recessing the gate electrode, e.g. to form a trench gate electrode
• CPC Class Codes: H01L 29/7806 the other device being a Schottky barrier diode
• CPC Class Codes: H01L 29/7811 with an edge termination structure guard regions per se H01L29/0619; field plates per se H01L29/402
• CPC Class Codes: H01L 29/7813 with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236

Abstract

A semiconductor device comprises a drain, a body disposed over the drain, having a body top surface, a source embedded in the body, extending downward from the body top surface into the body, a gate trench extending through the source and the body into the drain, a gate disposed in the gate trench, a source body contact trench having a trench wall and an anti-punch through implant that is disposed along the trench wall. A method of fabricating a semiconductor device comprises forming a hard mask on a substrate having a top substrate surface, forming a gate trench in the substrate, through the hard mask, depositing gate material in the gate trench, removing the hard mask to leave a gate structure, forming a source body contact trench having a trench wall and forming an anti-punch through implant.

Claims

1. A semiconductor device comprising:

a drain;

a body disposed over the drain, having a body top surface;

a source embedded in the body, extending downward from the body top surface into the body;

a gate trench extending through the source and the body into the drain;

a gate disposed in the gate trench; and

a source body contact trench having a trench wall, a trench bottom, and an anti-punch through implant that is disposed along the trench wall;

wherein;

the source body contact trench includes an electrode that is disposed within the source body contact trench;

the electrode is at least in part in physical contact with the source and at least in part in physical contact with the anti-punch through implant;

the anti-punch through implant is disposed along at least a section of the trench wall but not along at least a portion of the trench bottom.

2. The semiconductor device of claim 1, wherein the source body contact trench is in proximity of the gate trench and adjacent to the source.

3. The semiconductor device of claim 1, wherein the gate has a gate top surface that extends substantially above the body top surface.

4. The semiconductor device of claim 1, wherein the source has a source top surface, and the gate has a gate top surface that extends substantially above the source top surface.

5. The semiconductor device of claim 1, wherein the electrode includes a metal that is suitable for providing Ohmic contact to the source and the body regions.

6. The semiconductor device of claim 1, wherein the electrode includes a metal that is suitable for forming a Schottky diode with the drain region.

7. The semiconductor device of claim 1, wherein the electrode includes a material that is suitable for forming a Schottky diode with the drain region, and the material forms a plug in the bottom of the source body contact trench.

8. The semiconductor device of claim 1, wherein the electrode includes a metal that is suitable for both providing Ohmic contact to the source and the body regions and for forming a Schottky diode to the drain region.

9. The semiconductor device of claim 1, wherein the electrode includes platinum.

10. The semiconductor device of claim 1, wherein the electrode and the drain form a Schottky diode.

11. The semiconductor device of claim 1, wherein the electrode and the drain form a Schottky diode situated below a body diode of the device.

12. The semiconductor device of claim 1, wherein the electrode and the drain form a Schottky diode, and wherein a metal layer is disposed over the electrode to form a source body contact.

13. The semiconductor device of claim 1, wherein the source body contact trench extends through the body to the drain.

14. The semiconductor device of claim 1, wherein the source body contact trench is formed to have a smooth shape.

15. The semiconductor device of claim 1, wherein the anti-punch through implant includes a region heavily doped with P type material.

16. The semiconductor device of claim 1, wherein:

the anti-punch through region has a cross sectional depth measured in the direction perpendicular to the trench wall of the source body contact trench, and a cross sectional length that is measured in the direction along the source body contact trench wall; and

the cross sectional depth is substantially less than the cross sectional length.

17. A method of fabricating a semiconductor device, comprising:

forming a hard mask on a substrate having a top substrate surface;

forming a gate trench in the substrate, through the hard mask;

forming a gate structure, including by depositing gate material in the gate trench and removing the hard mask;

forming a source body contact trench having a trench wall;

forming an electrode in the source body contact trench such that the electrode is at least in part in physical contact with the source and at least in part in physical contact with the anti-punch through implant; and

forming an anti-punch through implant that is disposed along at least a section of the trench wall but not along at least a portion of the trench bottom.

18. The method of claim 17, wherein forming an anti-punch through implant includes implanting ions at an angle onto the trench wall.

19. The method of claim 17, wherein forming an anti-punch through implant includes implanting P-type ions at an angle onto the trench wall.

20. The method of claim 17, where the amount of gate material deposited in the trench extends beyond the top substrate surface and removing the hard mask leaves a gate structure that extends substantially above the top substrate surface.

21. The method of claim 17, wherein the hard mask is a SiO₂ hard mask.