Integrated inductors

• US 20080001698A1
• Filed: 06/29/2006
• Published: 01/03/2008
• Est. Priority Date: 06/29/2006
• Status: Active Grant

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Paillet, Fabrice, Gardner, Donald S., Schrom, Gerhard, Hazucha, Peter, Karnik, Tanay, Nguyen, Trang T., Moon, Sung T.
• Granted Patent: US 8,368,501 B2
• Time in Patent Office: Days
• US Class Current: 336/200
• CPC Class Codes: H01F 17/0033 with the coil helically wound around a magnetic core
• CPC Class Codes: H01F 2021/125 Printed variable inductor with taps, e.g. for VCO
• CPC Class Codes: H01F 21/12 discontinuously variable, e.g. tapped
• CPC Class Codes: H01F 27/34 Special means for preventing or reducing unwanted electric or magnetic effects, e.g. no-load losses, reactive currents, harmonics, oscillations, leakage fields

Abstract

Multiple-inductor embodiments for use in substrates are provided herein.

Claims

1. An apparatus comprising:

a substrate comprising a row of embedded inductors, wherein adjacent inductors within the row of inductors are complementary inductor pairs.

2. The apparatus of claim 1, in which the inductors comprise spaced apart vias conductively coupled together with at least a portion of a conductive layer in the substrate.

3. The apparatus of claim 2, in which each inductor comprises a single inductor turn.

4. The apparatus of claim 2, in which the inductors comprise conductive layer portions, used to couple inductor terminals, that cross one another, said conductive layer portions being disposed in separate layers.

5. The apparatus of claim 1, in which the inductors are skewed to increase routing density.

6. The apparatus of claim 1, in which the substrate is part of an integrated circuit and supports an electrical die comprising at least part of a power converter circuit coupled to the inductors.

7. The apparatus of claim 6, in which the power converter circuit is a multi-phase converter, wherein phase components substantially out of phase by 180 degrees drive the adjacent inductors.

8. The apparatus of claim 1, in which the substrate is part of a circuit board and supports an electrical die comprising at least part of a power converter circuit coupled to the inductors.

9. The apparatus of claim 8, in which the power converter circuit is a multi-phase converter, wherein phase components substantially out of phase by 180 degrees drive the adjacent inductors.

10. An apparatus comprising:

a substrate comprising embedded inductors; and

a semiconductor die comprising at least a portion of a multi-phase power converter circuit coupled to the inductors to provide a different phase component signal to each inductor, the phase components associated with the inductors resulting in reduced ripple.

11. The apparatus of claim 10, in which the inductors have inductor areas with substantial vertical components.

12. The apparatus of claim 11, in which the inductors are disposed into two adjacent rows with adjacent inductor terminals coupled together with a conductive layer portion to provide an output terminal for the converter.

13. The apparatus of claim 12, in which adjacent inductors in each row are driven by adjacent phase components, and proximal inductors from different rows are driven by substantially out-of-phase phase components.

14. The apparatus of claim 10, in which the inductors are aligned in a row with adjacent inductors within the row constituting complementary inductor pairs.

15. The apparatus of claim 10, in which the inductors are formed from spaced apart vias conductively coupled with conductive layer portions.

16. The apparatus of claim 15, in which the conductive layer portions are disposed in different layers.

17. The apparatus of claim 10, in which the substrate is disposed within a circuit board.

18. A system, comprising:

(a) a microprocessor;

(b) a power converter electrically coupled to the microprocessor to provide it with a regulated DC supply, said power converter comprising inductors disposed as a row of embedded inductors, wherein adjacent inductors within the row of inductors are complementary inductor pairs;

(c) an antenna; and

(d) a wireless interface coupled to the microprocessor and to the antenna to communicatively link the microprocessor to a wireless network.

19. The system of claim 18, further comprising a battery coupled to the power converter to provide it with power.