Testing a high speed serial bus within a printed circuit board

• US 20080003884A1
• Filed: 06/30/2006
• Published: 01/03/2008
• Est. Priority Date: 06/30/2006
• Status: Active Grant

• Current Assignee: Seagate Technology LLC (Seagate Technology Holdings Plc)
• Original Assignee: Seagate Technology LLC (Seagate Technology Holdings Plc)
• Inventors: Pagano, Bill, Spengler, David Louis
• Granted Patent: US 7,727,004 B2
• Time in Patent Office: Days
• US Class Current: 439/620.22
• CPC Class Codes: H05K 1/0268 for electrical inspection or testing
• CPC Class Codes: H05K 2201/09627 Special connections between adjacent vias, not for grounding vias
• CPC Class Codes: H05K 2201/1059 Connections made by press-fit insertion
• CPC Class Codes: H05K 2203/175 Configurations of connections suitable for easy deletion, e.g. modifiable circuits or temporary conductors for electroplating; Processes for deleting connections
• CPC Class Codes: H05K 3/306 Lead-in-hole components, e.g. affixing or retention before soldering, spacing means H05K3/32 takes precedence
• CPC Class Codes: H05K 3/42 Plated through-holes or plated via connections

Abstract

An apparatus and associated method for analyzing a communications link between two components on a common PCB. The communications link has a pair of through-board conductors connected by a first conductive etching on one side of the PCB. The communications link further has second etchings on an opposite side of the PCB respectively connecting each of the through-board conductors to one of the components.

Claims

1. A communications link between two components on a common printed circuit board (PCB) comprising:

a pair of through-board conductors connected by a first conductive etching on one side of the PCB; and

second etchings on an opposite side of the PCB respectively connecting each of the through-board conductors to one of the components.

2. The communications link of claim 1 characterized as a high speed serial bus.

3. The communications link of claim 2 wherein the through-board conductors are configured for connecting to a bus protocol analyzer.

4. The communications link of claim 3 connecting control components in a distributed storage array.

5. The communications link of claim 4 connecting components in a controller passing access commands between a remote device and a storage space.

6. The communications link of claim 5 connecting a software module to a processor.

7. The communications link of claim 6 connecting an operating system module to an intelligent storage processor.

8. The communications link of claim 2 configured for passing data at a transfer rate of one gigabits per second.

9. The communications link of claim 1 wherein the through-board conductors comprise conductive vias.

10. The communications link of claim 1 wherein the through-board conductors comprise conductive pads.

11. A method comprising:

providing a communications link between two components on a PCB having a pair of through-board conductors that are conductively connected by a first etching on one side of the PCB, and having a pair of etchings on an opposite side of the PCB conductively connecting each of the through-board conductors to one of the components; and

connecting an analyzer to the through-board conductors.

12. The method of claim 11 further comprising rendering the first etching nonconductive.

13. The method of claim 12 wherein the rendering step is characterized by open-circuiting the first etching.

14. The method of claim 12 wherein the providing step is characterized by a high speed serial bus communications link.

15. The method of claim 14 wherein the connecting step is characterized by analyzing control components in a distributed storage array.

16. The method of claim 15 wherein the connecting step is characterized by analyzing communications between the components in a controller passing access commands between a remote device and a storage space.

17. The method of claim 16 wherein the connecting step is characterized by analyzing communications between an operating system module and an intelligent storage processor.

18. The method of claim 14 wherein the connecting step is characterized by passing data at a transfer rate of one gigabits per second.

19. The method of claim 11 wherein the connecting step is characterized by connecting the analyzer to conductive vias in the PCB.

20. A device comprising:

a PCB having a high speed serial bus; and

means for connecting an analyzer to a medial portion of the high speed serial bus.