Method and apparatus for amplifying multiple signals using a single multiplexed amplifier channel with software controlled AC response

• US 20080004536A1
• Filed: 06/30/2006
• Published: 01/03/2008
• Est. Priority Date: 06/30/2006
• Status: Active Grant

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Baxi, Amit S., Peramachanahalli, RamKumar
• Granted Patent: US 8,200,317 B2
• Time in Patent Office: Days
• US Class Current: 600/509
• CPC Class Codes: A61B 5/304 Switching circuits

Abstract

A device for amplifying multiple signals includes a plurality of sensors, where a plurality of lead signals are derived from the plurality of sensors, a plurality of low-pass filter and buffer amplifiers for filtering and buffering the plurality of lead signals, one or more multiplexers, where outputs from the plurality of low-pass filter and buffer amplifiers are input to one of the one or more multiplexers, a single amplifier channel, where the outputs of the one or more multiplexers are input to the single amplifier channel and a microcontroller which controls the one or more multiplexers, wherein the microcontroller stores software which selects, in sequence, one at a time, one out of each of the lead signals to be connected to inputs of the single amplifier channel, wherein the single amplifier channel amplifies all of the lead signals. The single amplifier channel has a software programmable AC response.

Claims

1. An apparatus, comprising:

one or more multiplexers, wherein lead signals are input to the one or more multiplexers;

a single amplifier channel, where the outputs of the one or more multiplexers are input to the single amplifier channel; and

a microcontroller which controls the one or more multiplexers, wherein the microcontroller stores software which is capable of selecting, in sequence, one at a time, at least one of the lead signals to be connected to inputs of the single amplifier channel, wherein the single amplifier channel amplifies the lead signals.

2. The apparatus of claim 1, wherein the single amplifier channel comprises a differential amplifier, a programmable gain amplifier and an anti-aliasing filter.

3. The apparatus of claim 2, wherein the microcontroller comprises an analog-to-digital converter and a digital-to-analog converter.

4. The apparatus of claim 2, wherein

a selected lead signal is connected to an input of the differential amplifier;

an output of the differential amplifier is fed to an input of the programmable gain amplifier for DC offset removal and further amplification;

an output of the programmable gain amplifier is adapted to be filtered by the anti-aliasing filter;

the output of the anti-aliasing filter is adapted to be digitized by the microcontroller using the analog-to-digital converter; and

the microcontroller is capable of selecting the next lead signal to be amplified by using the multiplexers.

5. The apparatus of claim 4, wherein the microcontroller comprises hardware or software which is adapted to simulate a high-pass filter to remove DC offset by computing the DC offset from a voltage signal from the digitized outputs of the anti-aliasing filter, converting the DC offset to an analog representation by the digital-to-analog converter, and subtracting the DC offset back from the same lead signal in a next amplification cycle.

6. The apparatus of claim 5, wherein the software comprises code to model low-pass filter stages for the lead signals.

7. The apparatus of claim 6, wherein the low-pass filter is adapted to compute and track the time varying DC offset present in the digitized outputs of the anti-aliasing filter.

8. The apparatus of claim 6, further comprising a baseline restoration algorithm that is adapted to bring the low-pass digital filter and the programmable gain amplifier out of saturation.

9. The apparatus of claim 6, wherein frequency responses of the low-pass digital filters is adjustable to a desired value by changing coefficients of the filters in the software, wherein AC frequency response of the amplifier channel is programmable in the software.

10. The apparatus of claim 2, wherein a maximum gain of the programmable gain amplifier is capable of being limited by a ratio of resolution of the digital-to-analog converter to a resolution of the analog-to-digital converter to prevent signal distortion while removing the DC offset.

11. The apparatus of claim 1, wherein an AC response of the single channel amplifier is capable of being controlled and changed through software.

12. The apparatus of claim 2, wherein the anti-aliasing filter is configured by the microcontroller for different frequency cut-offs to match a required bandwidth and to reduce high frequency noise.

13. A method of amplifying multiple signals, comprising:

deriving a plurality of lead signals by performing differential voltage measurements across a combination of sensors;

selecting, in sequence, the lead signals to be connected to inputs of a single amplifier channel;

time-slicing the single amplifier channel, in a cyclic sequence, between the lead signals;

computing a DC drift for the sampled lead signals;

subtracting the DC drift from the respective sampled lead signals in a next sample of the respective lead signals, wherein the single amplifier channel amplifies the lead signals.

14. The method of claim 13, wherein, in each cycle, all lead signals are selected and switched in sequence and are then DC offset-corrected, amplified and digitized.

15. The method of claim 14, wherein the cycle repeats continuously at a rate of 500 cycles per second for performing a diagnostic-quality ECG.

16. The method of claim 13, wherein an AC response of the single channel amplifier is controlled and changed through software or hardware.

17. The method of claim 13, wherein computing the DC drift for each of the sampled lead signals is implemented through software or hardware.

18. An apparatus, comprising:

one or more multiplexers, wherein lead signals are adapted to be input to the one or more multiplexers;

at least one amplifier channel, where the outputs of the one or more multiplexers are capable of being input to the at least one amplifier channel and wherein the number of amplifier channels is less than a number of lead signals; and

a microcontroller which is adapted to control the one or more multiplexers, the microcontroller comprising hardware or software which is capable of simulating a high-pass filter to remove DC offset by computing the DC offset and subtracting the DC offset back from the same lead signal in a next amplification cycle, wherein the at least one amplifier channel is capable of amplifying the lead signals.

19. An apparatus, comprising:

a plurality of sensors, where a plurality of lead signals are derived from the plurality of electrodes;

a plurality of low-pass filter and buffer amplifiers which are capable of filtering and buffering the plurality of lead signals;

one or more multiplexers, where outputs from the plurality of low-pass filter and buffer amplifiers are capable of being input to one of the one or more multiplexers;

a single amplifier channel, where the outputs of the one or more multiplexers are capable of being input to the single amplifier channel; and

a microcontroller which is adapted to control the one or more multiplexers, wherein the microcontroller is adapted to store software which is capable of selecting, in sequence, one at a time, one out of the lead signals to be connected to inputs of the single amplifier channel, wherein the single amplifier channel is adapted to amplify the lead signals.

20. The apparatus of claim 19, wherein the microcontroller is adapted to time-slice the single amplifier channel, in a cyclic sequence, between the lead signals to compute a DC drift for the lead signals.

21. The apparatus of claim 20, wherein the microcontroller is adapted to subtract the DC drift from a respective sampled lead signal in a next sample of the lead signal.

22. The apparatus of claim 21, wherein the cycle is capable of repeating continuously at a rate of 500 cycles per second for performing a diagnostic-quality ECG.

23. The apparatus of claim 19, wherein the AC response of the apparatus is capable of being controlled by a software program stored in the microcontroller.