Method and device for protected transmission of data words

• US 20080004874A1
• Filed: 04/18/2006
• Published: 01/03/2008
• Est. Priority Date: 03/18/2005
• Status: Active Application

• Current Assignee: Infineon Technologies AG
• Original Assignee: Infineon Technologies AG
• Inventors: Wenzel, Andreas, Kunemund, Thomas, Klug, Franz, Sonnekalb, Steffen
• Application Number:
  US11/405,500
• Publication Number:
  US 20080004874A1
• Time in Patent Office: Days
• US Class Current: 704/232
• CPC Class Codes: G06F 11/08 Error detection or correction by redundancy in data representation, e.g. by using checking codes
• CPC Class Codes: G06F 9/30145 Instruction analysis, e.g. decoding, instruction word fields
• CPC Class Codes: G06F 9/3017 Runtime instruction translation, e.g. macros
• CPC Class Codes: G06F 9/3879 for non-native instruction execution, e.g. executing a command; for Java instruction set

Abstract

Method for protected transmission of data words includes providing a first data word, transforming the first data word into a sequence including at least one second data word using a first transformation rule, transforming at least one of the second data words into a third data word using a second transformation rule, and checking whether a prescribed relationship exists between the third data word and a comparison data word.

Claims

1-21. -21. (canceled)

22. A method for protected transmission of data words, comprising:

providing a first data word;

transforming the first data word into a sequence comprising at least one second data word using a first transformation rule,

transforming at least one of the second data words into a third data word using a second transformation rule; and

checking whether a prescribed relationship exists between the third data word and a comparison data word.

23. The method as claimed in claim 22, further comprising executing an alarm function if the prescribed relationship does not exist between the third data word and the comparison data word.

24. The method as claimed in claim 23, wherein the alarm function is a function selected from the group consisting of outputting an alarm, shutting down the circuit arrangement, shutting down and starting up the circuit arrangement, and subjecting the third data word to repeat data processing.

25. The method as claimed in claim 22, further comprising, prior to the step of transforming at one of the second data words, modifying the at least one second data word such that a distinct relationship exists between the third data word and the comparison data word.

26. The method as claimed in claim 25, wherein the step of modifying the at least one second data word comprises adding information to the at least one second data word.

27. The method as claimed in claim 22, wherein a distinct relationship exists between the third data word and the comparison data word.

28. The method as claimed in claim 22, wherein the distinct relationship is an identity of the third data word with the comparison data word.

29. The method as claimed in claim 22, wherein the first data word is the comparison data word.

30. The method as claimed in claim 22, wherein the second transformation rule is a reverse depiction of the first transformation rule.

31. The method as claimed in claim 22, further comprising transforming the first data word to produce the comparison data word by a third transformation rule.

32. The method as claimed in claim 31, wherein the result of the third transformation rule applied to the first data word is in the prescribed relationship with the result of the application of the second transformation rule after the first transformation rule to the first data word.

33. The method as claimed in claim 31, wherein the second transformation rule is identity and the first and third transformation rules are the same.

34. A circuit arrangement for protected transmission of data words, comprising:

a data input connected to a first transformation device, which is configured to transform a first data word applied to the data input into a sequence of data words which comprises at least one second data word;

a second transformation device, which is coupled to the first transformation device, is configured to transform at least one of the second data words into a third data word; and

a checking device, which has the third data word and a comparison data word supplied thereto, is configured to check whether the third data word and the comparison data word are in a prescribed relationship.

35. The circuit arrangement as claimed in claim 34, further comprising an alarm configured to perform an alarm function if the third data word and the comparison data word are not in the prescribed relationship.

36. The circuit arrangement as claimed in claim 35, wherein the alarm function is a function selected from the group consisting of outputting an alarm, shutting down the circuit arrangement, shutting down and starting up the circuit arrangement, and subjecting the third data word to repeat data processing.

37. The circuit arrangement as claimed in claim 34, wherein the first data word is supplied to the checking device as the comparison data word.

38. The circuit arrangement as claimed in claim 34, further comprising a device configured to modify the second data word such that the prescribed relationship between the comparison data word and the third data word is distinct.

39. The circuit arrangement as claimed in claim 34, wherein the first transformation device is configured to modify the second data word such that the prescribed relationship between the comparison data word and the third data word is distinct.

40. The circuit arrangement as claimed in claim 34, further comprising a third transformation device, which is connected upstream of the checking device, and is configured to transform the first data word applied to the data input into the comparison data word.

41. The circuit arrangement as claimed in claim 40, wherein the second transformation device is configured such that the third data word matches the second data word.

42. The circuit arrangement as claimed in claim 40, wherein the first and third transformation devices are configured to execute the same transformation.

43. The circuit arrangement as claimed in claim 34, wherein the prescribed relationship is identity of the comparison data word and the third data word.

44. The circuit arrangement as claimed in claim 34, further comprising an arithmetic and logic unit and a memory device, wherein the first transformation device is arranged between the arithmetic and logic unit and the memory device.

45. The circuit arrangement as claimed in claim 34, further comprising at least one further transformation device connected upstream and/or downstream of the first transformation device.

46. The circuit arrangement as claimed in claim 34, wherein the data input is a buffer stage.

47. The circuit arrangement as claimed in claim 44, further comprising a buffer stage, which is connected downstream of the first transformation device, and is configured to provide the at least one second data word to the arithmetic and logic unit.