GaN Compound Semiconductor Light Emitting Element and Method of Manufacturing the Same

• US 20080006836A1
• Filed: 10/21/2005
• Published: 01/10/2008
• Est. Priority Date: 10/22/2004
• Status: Active Grant

• Current Assignee: Postech Foundation, Seoul Viosys Co., Ltd. (Seoul Semiconductor Co., Ltd.)
• Original Assignee: Postech Foundation, Seoul Optodevice Company Limited (Seoul Semiconductor Co., Ltd.)
• Inventors: Lee, Jong Lam
• Granted Patent: US 7,964,884 B2
• Time in Patent Office: Days
• US Class Current: 257/098
• CPC Class Codes: H01L 33/0093 Wafer bonding; Removal of the growth substrate
• CPC Class Codes: H01L 33/32 containing nitrogen
• CPC Class Codes: H01L 33/387 with a plurality of electrode regions in direct contact with the semiconductor body and being electrically interconnected by another electrode layer
• CPC Class Codes: H01L 33/40 Materials therefor
• CPC Class Codes: H01L 33/405 Reflective materials
• CPC Class Codes: H01L 33/44 characterised by the coatings, e.g. passivation layer or anti-reflective coating

Abstract

The present invention relates to a gallium nitride (GaN) compound semiconductor light emitting element (LED) and a method of manufacturing the same. The present invention provides a vertical GaN LED capable of improving the characteristics of a horizontal LED by means of a metallic protective film layer and a metallic support layer. According to the present invention, a thick metallic protective film layer with a thickness of at least 10 microns is formed on the lateral and/or bottom sides of the vertical GaN LED to protect the element against external impact and to easily separate the chip. Further, a metallic substrate is used instead of a sapphire substrate to efficiently release the generated heat to the outside when the element is operated, so that the LED can be suitable for a high-power application and an element having improved optical output characteristics can also be manufactured. A metallic support layer is formed to protect the element from being distorted or damaged due to impact. Furthermore, a P-type electrode is partially formed on a P—GaN layer in a mesh form to thereby maximize the emission of photons generated in the active layer toward the N—GaN layer.

Claims

1. A light emitting element, comprising:

a metallic support layer;

a P-type reflective film electrode on the metallic support layer;

a P-type semiconductor layer, an active layer and an N-type semiconductor layer sequentially formed on the P-type reflective film electrode; and

an N-type electrode formed on the N-type semiconductor layer.

3. The light emitting element as claimed in claim 1, further comprising an insulation film formed at least on a lateral side of the N-type semiconductor layer, and a metallic protective layer for protecting the P-type and N-type semiconductor layers.

4. The light emitting element as claimed in claim 1, wherein the metallic support layer has a multi-layered support structure.

5. The light emitting element as claimed in claim 1, further comprising a protective layer formed on a part of lateral and/or bottom sides of the N-type semiconductor layer, active layer and P-type semiconductor layer.

6. The light emitting element as claimed in claim 1, further comprising an anti-reflective layer wrapping around the P-type semiconductor layer, active layer and N-type semiconductor layer.

7. The light emitting element as claimed in claim 1, wherein the P-type reflective film electrode comprises a contact metallic layer, a reflective metallic layer, a diffusion barrier layer and a bonding metallic layer.

2. A light emitting element, comprising:

a metallic support layer;

a reflective layer formed on the metallic support layer;

a P-type reflective film electrode formed in the form of a mesh on the reflective layer;

a P-type semiconductor layer, an active layer and an N-type semiconductor layer sequentially formed on the top of the reflective layer including the P-type reflective film electrode; and

an N-type electrode formed at a desired region on the N-type semiconductor layer.

8. A light emitting element, comprising:

a P-type semiconductor layer;

an active layer and an N-type semiconductor layer formed on the P-type semiconductor layer;

an N-type electrode formed on the N-type semiconductor layer;

an insulation film formed on at least a lateral side of the N-type semiconductor layer; and

a metallic protective layer for protecting the P-type semiconductor layer and N-type semiconductor layer.

9. The light emitting element as claimed in claim 8, wherein the metallic protective layer is formed on lateral sides of the P-type and N-type semiconductor layers and on a bottom side of the P-type semiconductor layer.

10. The light emitting element as claimed in claim 8, further comprising an insulation layer formed on a part of a bottom side of the P-type semiconductor layer.

11. The light emitting element as claimed in claim 10, wherein the insulation layer extends to a lateral side of the active layer.

12. The light emitting element as claimed in claim 8, further comprising an anti- reflective layer formed on the N-type semiconductor layer.

13. The light emitting element as claimed in claim 8, further comprising a P-type electrode formed beneath the P-type semiconductor layer.

14. The light emitting element as claimed in claim 13, wherein the P-type electrode includes a contact metallic layer, a reflective metallic layer, a diffusion barrier layer and a bonding metallic layer.

15. A method of manufacturing a light emitting element, comprising the steps of:

sequentially forming an N-type semiconductor layer, an active layer and a P-type semiconductor layer on a substrate;

isolating the element by partially etching the P-type semiconductor layer, the active layer, the N-type semiconductor layer and the substrate;

forming a P-type reflective film electrode on the isolated P-type semiconductor layer and forming a first metallic support layer on the whole structure;

removing the substrate; and

forming an N-type electrode on the N-type semiconductor layer.

17. The method as claimed in claim 15, wherein an isolated second metallic support layer is formed on the first metallic support layer, and the first and second metallic support layers are formed through an electroplating method or using a vacuum vapor-deposition apparatus such as a thermal evaporator, an e-beam evaporator, a laser evaporator, a sputter and an MOCVD apparatus.

18. The method as claimed in claim 17, wherein the first and second metallic support layers are formed of at least one of Au, Ni, W, Mo, Cu, Al, Ta, Ag, Pt and Cr, or using a conductive ceramic substrate such as SrTiO₃ doped with Nb, ZnO doped with Al, ITO (Indium Tin Oxide) or IZO (Indium Zinc Oxide) or a semiconductor substrate such as B-doped Si, As-doped Si and diamond doped with impurities, and a total thickness of the first and second metallic support layers is 0.5 to 200 nm.

19. The method as claimed in claim 15, further comprising the step of, after the step of isolating the element, forming a protective layer for protecting the isolated P-type semiconductor layer, active layer and N-type semiconductor layer.

20. The method as claimed in claim 15, further comprising the step of, after the step of isolating the element, forming an anti-reflective layer wrapping around the isolated P-type semiconductor layer, active layer and N-type semiconductor layer.

21. The method as claimed in claim 20, wherein a portion of the anti-reflective layer formed on the N-type semiconductor layer is removed and the N-type electrode is then formed on the removed portion of the anti-reflective layer.

16. A method of manufacturing a light emitting element, comprising the steps of:

sequentially forming an N-type semiconductor layer, an active layer, a P-type semiconductor layer, a P-type reflective film electrode and a first metallic support layer on a substrate;

removing the substrate;

isolating the element by partially etching the P-type semiconductor layer, the active layer and the N-type semiconductor layer; and

forming an N-type electrode on the N-type semiconductor layer.

22. A method of manufacturing a vertical semiconductor light emitting element, comprising the steps of:

sequentially forming an N-type semiconductor layer, an active layer and a P-type semiconductor layer on a substrate;

forming an insulation film on a lateral side of the N-type semiconductor layer except a portion of the P-type semiconductor layer;

forming a P-type electrode on the portion of the P-type semiconductor layer on which the insulation film is not formed;

forming a metallic support film layer in such a way to wrap around the P-type and N-type semiconductor layers;

removing the substrate; and

forming an N-type electrode on the N-type semiconductor layer.

23. The method as claimed in claim 22, further comprising the step of, after the step of forming the P-type electrode, forming a reflective layer on the P-type semiconductor layer on which the P-type electrode is formed.

24. The method as claimed in claim 22, further comprising the steps of, after the step of forming a reflective layer on the P-type semiconductor layer, removing the reflective layer on a region on which the P-type electrode will be formed and forming the P-type electrode on the region from which the reflective layer is removed.

25. The method as claimed in claim 22, further comprising the step of, after the step of forming the metallic protective film layer, forming a metallic support layer on the P-type semiconductor layer on which the metallic protective film layer is formed.

26. The method as claimed in claim 22, further comprising the steps of, after the step of removing the substrate, forming an anti-reflective layer on the N-type semiconductor layer and exposing a portion of the N-type semiconductor layer by removing a portion of the anti-reflective layer.

27. The method as claimed in claim 22, wherein the step of forming the insulation film on a lateral side of the N-type semiconductor layer except a portion of the P-type semiconductor layer comprises the steps of forming the insulation film in such a way to wrap around the P-type and N-type semiconductor layers and removing the portion of the insulation film from the P-type semiconductor layer.