Methods and systems for semiconductor testing using reference dice

• US 20080007284A1
• Filed: 07/05/2006
• Published: 01/10/2008
• Est. Priority Date: 07/05/2006
• Status: Active Grant

• Current Assignee: Optimal Plus Ltd. (Emerson Electric Company)
• Original Assignee: Optimaltest, Ltd. (Emerson Electric Company)
• Inventors: Balog, Gil
• Granted Patent: US 7,532,024 B2
• Time in Patent Office: Days
• US Class Current: 324/765
• CPC Class Codes: G01R 31/2894 Aspects of quality control [QC] G01R31/31718 takes precedence; program control for QC G05B19/41875
• CPC Class Codes: G01R 31/31707 Test strategies methods for generation of test sequences G01R31/318371
• CPC Class Codes: G01R 31/318511 Wafer Test

Abstract

Methods and systems of semiconductor testing where reference dice and non-reference dice in a wafer and/or lot are tested differently. In one embodiment of the invention, geography, lithography exposure, other characteristics, performance and/or behavior are taken into account when selecting reference dice, thereby improving the likelihood that the response of reference dice to testing is well representative of the wafer and/or lot. In one embodiment, based on data from the testing of reference dice, the test flow for non-reference dice and/or other testing may or may not be adjusted.

Claims

1. A system for semiconductor testing, comprising:

a test manager configured to determine a group of semiconductor dice in a wafer which can be assumed to respond similarly to testing, wherein said group includes less than all dice in said wafer, and configured to select at least one reference die from said group for testing differently than other dice in said group which were not selected as reference dice, wherein said at least one reference die includes less than all dice in said group.

2. The system of claim 1, wherein said test manager is configured to include in said group dice which are geographical proximity neighbors.

3. The system of claim 1, wherein said test manager is configured to include in said group dice which are in a same lithography exposure.

4. The system of claim 1, wherein said test manager is configured to include in said group dice out which are in a same position across lithography exposures.

5. The system of claim 1, wherein said test manager is configured to include in said group dice which are in a same geographical ring.

6. The system of claim 1, wherein said test manager is configured to select a die from said group as a reference die at least partly because said die is next to an E-test structure.

7. The system of claim 1, wherein said test manager is configured to select a die from said group as a reference die at least partly because said die is from a high failure area.

8. The system of claim 1, wherein said test manager is configured to select a die from said group as a reference die randomly.

9. The system of claim 1, wherein said test manager is configured to select a die from said group as a reference die at least partly because of a lithography exposure including said die.

10. The system of claim 1, wherein said test manager is configured to select a die from said group as a reference die at least partly because of a position of said die in a lithography exposure.

11. The system of claim 1, wherein said test manager is configured to select a die from said group as a reference die at least partly because said die is not a geographical proximity neighbor of another reference die.

12. The system of claim 1, wherein said test manager is configured to select a die from said group as a reference die at least partly because of a geographical ring including said die.

13. The system of claim 1, further comprising:

offline tools configured to define which tests are performed on said at least one reference die and not performed on said other dice in said group unless activated.

14. The system of claim 13, wherein said offline tools are further configured to define a default test workflow for said wafer.

15. The system of claim 13, wherein said offline tools are further configured to simulate activation criteria for changing said default test workflow.

16. The system of claim 13, wherein said offline tools are further configured to simulate activation criteria for activating said tests to be performed on said other dice.

17. A method of semiconductor testing, comprising:

identifying or not identifying a semiconductor die provided for testing as a reference die which had been previously selected as representative of a group of dice in a wafer that can be assumed to respond similarly to testing, wherein said group includes less than all dice in said wafer, and wherein less than all dice in said group had been previously selected as a reference die;

if said die is identified as a reference die, testing said die with a reference die test flow; and

if said die is not identified as a reference die, testing said die with a non-reference die test flow.

18. The method of claim 17, wherein there are a plurality of reference die test flows further comprising:

recognizing said identified reference die as corresponding to one of said plurality of reference die test flows and wherein said testing with a reference die test flow includes testing with said corresponding reference die test flow.

19. The method of claim 17, wherein said testing said die with a reference die test flow includes applying a data collection test not included in said non-reference die test flow.

20. The method of claim 17, wherein said testing said die with a reference die test flow includes applying a failure identification test not included in said non-reference die test flow.

21. The method of claim 17, wherein said testing said die with a reference die test flow includes applying a test which is different compared to a test included in said non-reference die test flow.

22. The method of claim 17, further comprising:

adjusting or not adjusting said non-reference die test flow based on data relating to reference dice, prior to testing said die not identified as a reference die.

23. The method of claim 22, wherein said data relating to reference dice includes a comparison between a failure rate for a test for reference dice compared to a predefined threshold.

24. The method of claim 23, wherein said comparison is between a number of reference dice which failed said test compared to a predefined threshold.

25. The method of claim 23, wherein said comparison is between a number of sequential reference dice which failed said test compared to a predefined threshold.

26. The method of claim 22, wherein said data relating to reference dice includes parametric test results.

27. The method of claim 22, wherein said adjusting includes adding at least one test to said non-reference die test flow.

28. The method of claim 22, wherein said adjusting includes changing at least one test in said non-reference die test flow.

29. The method of claim 22, wherein said adjusting includes additional stressing.

30. The method of claim 17, further comprising at least one selected from a group comprising:

changing a test limit for a test, bypassing a test, executing a test, changing a search limit, changing a force value, turning a datalog on, turning a datalog off, updating a test flow, retesting, resorting, holding, scrapping, and tagging.

31. The method of claim 17, further comprising:

adjusting a test workflow based on data relating to reference dice.

32. A method of semiconductor testing, comprising:

determining a group of semiconductor dice in a wafer which can be assumed to respond similarly to testing, wherein said group includes less than all dice in said wafer; and

selecting at least one reference die from said group for testing differently than other dice in said group which were not selected as reference dice, wherein said at least one reference die includes less than all dice in said group.

33. A method of semiconductor testing, comprising:

determining a group of semiconductor dice in a wafer which can be assumed to respond similarly to testing, wherein said group includes less than all dice in said wafer;

selecting at least one reference die from said group, wherein said at least one reference die includes less than all dice in said group; and

applying test flows to said group, wherein a test flow applied to a selected reference die from said group differs from a test flow applied to a die which was not selected as a reference die from said group.

34. A system for semiconductor testing, comprising:

a test cell configured to identify or not identify a semiconductor die provided for testing as a reference die which had been previously selected as representative of a group of dice in a wafer that can be assumed to respond similarly to testing, wherein said group includes less than all dice in said wafer, and wherein less than all dice in said group had been previously selected as a reference die;

configured to test said die with a reference die test flow, if said die is identified as a reference die, and configured to test said die with a non-reference die test flow if said die is not identified as a reference die.

35. A computer program product comprising a computer useable medium having computer readable program code embodied therein of semiconductor testing, the computer program product comprising:

computer readable program code for causing the computer to determine a group of semiconductor dice in a wafer which can be assumed to respond similarly to testing, wherein said group includes less than all dice in said wafer; and

computer readable program code for causing the computer to select at least one reference die from said group for testing differently than other dice in said group which were not selected as reference dice, wherein said at least one reference die includes less than all dice in said group.

36. A computer program product comprising a computer useable medium having computer readable program code embodied therein of semiconductor testing, the computer program product comprising:

computer readable program code for causing the computer to identify or not identify a semiconductor die provided for testing as a reference die which had been previously selected as representative of a group of dice in a wafer that can be assumed to respond similarly to testing, wherein said group includes less than all dice in said wafer, and wherein less than all dice in said group had been previously selected as a reference die;

computer readable program code for causing the computer to test said die with a reference die test flow if said die is identified as a reference die; and

computer readable program code for causing the computer to test said die with a non-reference die test flow if said die is not identified as a reference die.