Image processor and image processing method
First Claim
1. An image processor, comprising:
- a line memory having a source image area and a decoration image area allocated thereto, the source image area sequentially retaining therein partial source image data which corresponds to at least one line of a screenful of a source image, the decoration image area retaining therein decoration image data which corresponds to a decoration image for decoration of the source image; and
an image superimposing circuit which repeatedly performs superimposing processing to superimpose the partial source image data retained in said line memory with partial decoration image data, until the source image is superimposed, the partial decoration image data corresponding to partial source image data.
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Abstract
A line memory has a source image area and a decoration image area allocated thereto. The source image area sequentially retains partial source image data corresponding to at least one line of a screenful of a source image. The decoration image area retains decoration image data corresponding to a decoration image for decoration of the source image. An image superimposing circuit repeatedly performs superimposing processing to superimpose the partial source image data retained in the line memory with partial decoration image data corresponding to the partial source image data, until a screenful of the source image is superimposed. Thus, the source image data and the decoration image data can be superimposed without use of a system bus. This can prevent increase in system bus utilization.
37 Citations
20 Claims
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1. An image processor, comprising:
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a line memory having a source image area and a decoration image area allocated thereto, the source image area sequentially retaining therein partial source image data which corresponds to at least one line of a screenful of a source image, the decoration image area retaining therein decoration image data which corresponds to a decoration image for decoration of the source image; and an image superimposing circuit which repeatedly performs superimposing processing to superimpose the partial source image data retained in said line memory with partial decoration image data, until the source image is superimposed, the partial decoration image data corresponding to partial source image data. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12)
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13. An image processing method, comprising the steps of:
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retaining decoration image data in a decoration image area allocated to a line memory, the decoration image data corresponding to a decoration image for decoration of a screenful of a source image; sequentially retaining partial source image data in a source image area allocated to said line memory, the partial source image data corresponding to at least one line of the source image; and repeatedly performing superimposing processing to superimpose the partial source image data retained sequentially in said line memory with partial decoration image data, until said source image is superimposed, the partial decoration image data corresponding to the partial source image data. - View Dependent Claims (14, 15, 16, 17, 18, 19, 20)
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Specification