APPLICATIONS OF HALOGEN CONVERTER CONTROL IC

• US 20080018268A1
• Filed: 08/01/2007
• Published: 01/24/2008
• Est. Priority Date: 04/08/2004
• Status: Active Grant

• Current Assignee: Infineon Technologies Americas Corp. (Infineon Technologies AG)
• Original Assignee: International Rectifier Corporation (Infineon Technologies AG)
• Inventors: Green, Peter
• Granted Patent: US 7,521,878 B2
• Time in Patent Office: Days
• US Class Current: 315/308
• CPC Class Codes: H02M 1/0012 Control circuits using digital or numerical techniques in DC/DC converters H02M3/157, H02M3/33515; in DC-AC converters H02M7/53873
• CPC Class Codes: H02M 5/458 using semiconductor devices only
• CPC Class Codes: H05B 39/045 with high-frequency bridge converters H05B39/048 takes precedence
• CPC Class Codes: H05B 47/18 via data-bus transmission
• CPC Class Codes: Y02B 20/00 Energy efficient lighting technologies, e.g. halogen lamps or gas discharge lamps

Abstract

The functionality of electronic convertors for low voltage filament lamp applications, such as halogen lamps, can be increased by including auxiliary circuits. Such auxiliary circuits may include gate drive resistors; a charge pump for sustaining the DC supply; open circuit protection; short circuit protection; thermal protection; extended resetting time; latched shutdown; self-dimming; a digital (DALI) interface; and line voltage compensation.

Claims

1. A power supply circuit for powering a load, comprising:

a half-bridge comprising a pair of high-side and low-side switching devices arranged in series between a high-side supply circuit and a common return circuit;

a connection point between said switching devices providing a switched output for powering said load; and

an integrated circuit, including a high-side driver and a low-side driver for respectively providing drive signals to control terminals of said high- and low-side switching devices, said high- and low-side drivers being controlled by an oscillator and timing and logic elements in the integrated circuit;

further comprising a pair of drive resistors connected between the high- and low-side drivers and the corresponding control terminals of the switching devices, said drive resistors being effective to limit dv/dt at said control terminals.

2. A power supply circuit for powering a load, comprising:

a half-bridge comprising a pair of high-side and low-side switching devices arranged in series between a high-side supply circuit and a common return circuit;

a connection point between said switching devices providing a switched output for powering said load; and

an integrated circuit, including a high-side driver and a low-side driver for respectively providing drive signals to control terminals of said high- and low-side switching devices, said high- and low-side drivers being controlled by an oscillator and timing and logic elements in the integrated circuit;

further comprising a charge pump circuit which feeds back current from said switched output to an IC bus supply terminal for contributing to power supplied to said IC.

3. A power supply circuit of claim 2, wherein charge pump circuit comprises a series connection of a snubber capacitor connected to said switched output, and a first diode whose anode is connected to said IC bus supply terminal.

4. A power supply circuit of claim 3, further comprising a second diode having a cathode connected to a common terminal of said IC and an anode connected to a connection point of said snubber capacitor and said first diode.

5. A power supply circuit for powering a load, comprising:

a half-bridge comprising a pair of high-side and low-side switching devices arranged in series between a high-side supply circuit and a common return circuit;

a connection point between said switching devices providing a switched output for powering said load; and

an integrated circuit, including a high-side driver and a low-side driver for respectively providing drive signals to control terminals of said high- and low-side switching devices, said high- and low-side drivers being controlled by an oscillator and timing and logic elements in the integrated circuit;

a protective circuit which responds to high dv/dt at the switched output by delivering a voltage peak to a current sense terminal of said IC.

6. A power supply circuit of claim 5, wherein the protective circuit responds to an open circuit at said load.

7. A power supply circuit of claim 5, wherein the protective circuit comprises a capacitor and a resistor connected in series to said switched output, and a diode with its cathode connected to a node of said capacitor and resistor, and its anode connected to said current sense terminal.

8. A power supply circuit for powering a load, comprising:

a half-bridge comprising a pair of high-side and low-side switching devices arranged in series between a high-side supply circuit and a common return circuit;

a connection point between said switching devices providing a switched output for powering said load; and

an integrated circuit, including a high-side driver and a low-side driver for respectively providing drive signals to control terminals of said high- and low-side switching devices, said high- and low-side drivers being controlled by an oscillator and timing and logic elements in the integrated circuit;

said IC having a shutdown terminal, a shutdown capacitor at said shutdown terminal being charged to a predetermined high level in order to shut down the IC and discharged to a predetermined low level in order to reset the IC;

a resistor interconnecting said shutdown capacitor and a voltage source in order to supply a current to said shutdown capacitor to prolong said discharge and thereby extend the resetting time of said IC.

9. A power supply circuit of claim 8, wherein said shutdown capacitor is external of said IC and is discharged by an internal circuit of said IC.

10. A power supply circuit of claim 8, wherein said voltage source is a voltage bus supply terminal of said IC.

11. A power supply circuit of claim 10, wherein said resistor has a high value on the order of megohms and thereby delivers a low current on the order of microamps to said shutdown capacitor.

12. A power supply circuit for powering a load, comprising:

a half-bridge comprising a pair of high-side and low-side switching devices arranged in series between a high-side supply circuit and a common return circuit;

a connection point between said switching devices providing a switched output for powering said load; and

an integrated circuit, including a high-side driver and a low-side driver for respectively providing drive signals to control terminals of said high- and low-side switching devices, said high- and low-side drivers being controlled by an oscillator and timing and logic elements in the integrated circuit;

wherein said IC has a latched shutdown mode;

further comprising a latched shutdown trigger circuit which responds to a short circuit condition at said switched output by placing said IC in said latched shutdown mode.

13. A power supply circuit of claim 12, wherein said latched shutdown mode is entered in response to a voltage above a given threshold applied to a current sense pin for a given time, and wherein said trigger circuit applies said given voltage to said current sense pin for said given time so that said IC enters said latched shutdown in response to a short circuit.

14. A power supply circuit of claim 12, further comprising a delay circuit for delaying said response of said latched shutdown trigger circuit.

15. A power supply circuit of claim 12, wherein said trigger circuit comprises:

a triggerable device connected between a main IC voltage bus and a common bus; and

a sensing circuit which delivers a trigger signal to said triggerable device in response to a short circuit;

whereby a short circuit causes said triggerable device to pull down said IC bus voltage.

16. A power supply circuit of claim 15, wherein said triggerable device comprises an SCR and said sensing circuit senses an overcurrent in said half-bridge.

17. A power supply circuit of claim 16, further comprising a delay circuit for delaying said response of said latched shutdown trigger circuit.

18. A power supply circuit for powering a load, comprising:

a half-bridge comprising a pair of high-side and low-side switching devices arranged in series between a high-side supply circuit and a common return circuit;

a connection point between said switching devices providing a switched output for powering said load; and

an integrated circuit, including a high-side driver and a low-side driver for respectively providing drive signals to control terminals of said high- and low-side switching devices, said high- and low-side drivers being controlled by an oscillator and timing and logic elements in the integrated circuit; and

a PFC-correcting boost converter at the front end of said power supply circuit providing a smooth and regulated DC bus voltage.

19. A power supply circuit for powering a load, comprising:

a half-bridge comprising a pair of high-side and low-side switching devices arranged in series between a high-side supply circuit and a common return circuit;

a connection point between said switching devices providing a switched output for powering said load; and

an integrated circuit, including a high-side driver and a low-side driver for respectively providing drive signals to control terminals of said high- and low-side switching devices, said high- and low-side drivers being controlled by an oscillator and timing and logic elements in the integrated circuit; and

a peak detecting circuit which regulates output voltage by feeding back the load voltage to the current sense pin of the IC, whereby the oscillator frequency increases and the load voltage decreases in response to peaks of said load voltage.

20. A power supply circuit of claim 19, wherein said feedback voltage increases the oscillator frequency and thereby decreases the load voltage in response to peaks of said load voltage.

21. A power supply circuit of claim 20, wherein said load voltage is taken at the secondary of a transformer whose primary is connected to said switched output voltage of said half-bridge.

22. A power supply circuit of claim 19, wherein said feedback voltage increases the duty cycle of a periodic waveform applied to said current sense pin and thereby increases the oscillator frequency and decreases the load voltage in response to peaks of said load voltage.

23. A power supply circuit of claim 22, wherein said load voltage is taken at the secondary of a transformer whose primary is connected to said switched output voltage of said half-bridge.

24. A power supply circuit of claim 19, wherein said peak detecting circuit feeds back a voltage taken at a secondary of a transformer whose primary is connected to said switched output voltage of said half-bridge, said load power being supplied by another secondary of said transformer.

25. A power supply circuit of claim 19, wherein said IC has a latched shutdown mode;

further comprising a latched shutdown trigger circuit which responds to a short circuit condition at said switched output by placing said IC in said latched shutdown mode.

26. A method of supplying power to a load, using:

a half-bridge comprising a pair of high-side and low-side switching devices arranged in series between a high-side supply circuit and a common return circuit;

a connection point between said switching devices providing a switched output for powering said load; and

an integrated circuit, including a high-side driver and a low-side driver for respectively providing drive signals to control terminals of said high- and low-side switching devices, said high- and low-side drivers being controlled by an oscillator and timing and logic elements in the integrated circuit;

said method comprising the step of limiting dv/dt at said control terminals with a pair of drive resistors connected between the high- and low-side drivers and the corresponding control terminals of the switching devices.

27. A method of supplying power to a load, using:

a half-bridge comprising a pair of high-side and low-side switching devices arranged in series between a high-side supply circuit and a common return circuit;

a connection point between said switching devices providing a switched output for powering said load; and

an integrated circuit, including a high-side driver and a low-side driver for respectively providing drive signals to control terminals of said high- and low-side switching devices, said high- and low-side drivers being controlled by an oscillator and timing and logic elements in the integrated circuit;

said method comprising the step of feeding back current from said switched output to an IC bus supply terminal for contributing to power supplied to said IC.

28. The method of claim 27, wherein said current is fed back with a charge pump circuit.

29. A method of supplying power to a load, using:

a half-bridge comprising a pair of high-side and low-side switching devices arranged in series between a high-side supply circuit and a common return circuit;

a connection point between said switching devices providing a switched output for powering said load; and

an integrated circuit, including a high-side driver and a low-side driver for respectively providing drive signals to control terminals of said high- and low-side switching devices, said high- and low-side drivers being controlled by an oscillator and timing and logic elements in the integrated circuit;

said method comprising the step of protecting said IC by delivering a voltage peak to a current sense terminal of said IC in response to high dv/dt at the switched output.

30. The method of claim 29, wherein said voltage peak is provided in response to an open circuit at said load.

31. A method of supplying power to a load, using:

a half-bridge comprising a pair of high-side and low-side switching devices arranged in series between a high-side supply circuit and a common return circuit;

a connection point between said switching devices providing a switched output for powering said load; and

an integrated circuit, including a high-side driver and a low-side driver for respectively providing drive signals to control terminals of said high- and low-side switching devices, said high- and low-side drivers being controlled by an oscillator and timing and logic elements in the integrated circuit;

said IC having a shutdown terminal, a shutdown capacitor at said shutdown terminal being charged to a given high level in order to shut down the IC and discharged to a given low level in order to reset the IC;

said method comprising the step of supplying a current to said shutdown capacitor to prolong said discharge and thereby extend the resetting time of said IC.

32. The method of claim 31, wherein said current is supplied by a resistor interconnecting said shutdown capacitor and a voltage source.

33. The method of claim 32, wherein said resistor has a high value on the order of megohms and thereby delivers a low current on the order of microamps to said shutdown capacitor.

34. A method of supplying power to a load, using:

a half-bridge comprising a pair of high-side and low-side switching devices arranged in series between a high-side supply circuit and a common return circuit;

a connection point between said switching devices providing a switched output for powering said load; and

an integrated circuit, including a high-side driver and a low-side driver for respectively providing drive signals to control terminals of said high- and low-side switching devices, said high- and low-side drivers being controlled by an oscillator and timing and logic elements in the integrated circuit;

wherein said IC has a latched shutdown mode;

said method comprising the step of responding to a short circuit condition by placing said IC in said latched shutdown mode.

35. The method of claim 34, wherein said latched shutdown mode is entered in response to a voltage above a given threshold applied to a current sense pin for a given time and wherein said trigger circuit applies said given voltage to said current sense pin for said given time so that said IC enters a latched shutdown in response to a short circuit.

36. The method of claim 34, further comprising a delay circuit for delaying said response of said latched shutdown trigger circuit.

37. The method of claim 34, wherein said trigger circuit comprises:

a triggerable device connected between a main IC voltage bus and a common bus; and

a sensing circuit which delivers a trigger signal to said triggerable device in response to a short circuit;

whereby a short circuit causes said triggerable device to pull down said IC bus voltage.

38. The method of claim 37, wherein said triggerable device comprises an SCR and said sensing circuit senses an overcurrent in said half-bridge.

39. The method of claim 38, further comprising a delay circuit for delaying said response of said latched shutdown trigger circuit.

40. A method of supplying power to a load, using:

a half-bridge comprising a pair of high-side and low-side switching devices arranged in series between a high-side supply circuit and a common return circuit;

a connection point between said switching devices providing a switched output for powering said load; and

an integrated circuit, including a high-side driver and a low-side driver for respectively providing drive signals to control terminals of said high- and low-side switching devices, said high- and low-side drivers being controlled by an oscillator and timing and logic elements in the integrated circuit; and

said method comprising the step of providing a smooth and regulated DC bus voltage at the front end of said power supply circuit with a PFC-correcting boost converter.

41. A method of supplying power to a load, using:

a half-bridge comprising a pair of high-side and low-side switching devices arranged in series between a high-side supply circuit and a common return circuit;

a connection point between said switching devices providing a switched output for powering said load; and

an integrated circuit, including a high-side driver and a low-side driver for respectively providing drive signals to control terminals of said high- and low-side switching devices, said high- and low-side drivers being controlled by an oscillator and timing and logic elements in the integrated circuit; and

said method comprising the step of regulating output voltage by feeding back the load voltage to the current sense pin of the IC, whereby the oscillator frequency increases and the load voltage decreases in response to peaks of said load voltage.

42. The method of claim 41, wherein said feedback voltage increases the oscillator frequency and decreases the load voltage in response to peaks of said load voltage.

43. The method of claim 42, wherein said load voltage is taken at the secondary of a transformer connected to said switched output voltage of said half-bridge.

44. The method of claim 41, wherein said feedback voltage increases the duty cycle of a periodic waveform applied to said current sense pin and thereby increases the oscillator frequency and decreases the load voltage in response to peaks of said load voltage.

45. The method of claim 44, wherein said load voltage is taken at the secondary of a transformer connected to said switched output voltage of said half-bridge.

46. The method of claim 41, wherein said peak detecting circuit feeds back a voltage taken at a secondary of a transformer connected to said switched output voltage of said half-bridge, said load power being supplied by another secondary of said transformer.

47. A method of avoiding high temperatures in a power supply circuit comprising at least one semiconductor switching device and a driver IC for driving said switching device, said driver IC having a thermal shutdown mode responsive to high temperatures at said driver IC;

said method comprising the step of providing an electrical conductor between said driver IC output and said switching device having sufficiently short length and high thermal conductivity to conduct sufficient heat from said switching device to said driver IC, so that said driver IC is placed in thermal shutdown mode before the switching device is damaged by said heat.