Surface emitting semiconductor device

• US 20080019410A1
• Filed: 07/19/2007
• Published: 01/24/2008
• Est. Priority Date: 07/20/2006
• Status: Active Grant

• Current Assignee: Sumitomo Electric Industries Limited (Sumitomo Corporation)
• Original Assignee: Sumitomo Electric Industries Limited (Sumitomo Corporation)
• Inventors: Onishi, Yutaka
• Granted Patent: US 7,668,219 B2
• Time in Patent Office: Days
• US Class Current: 372/45.01
• CPC Class Codes: B82Y 20/00 Nanooptics, e.g. quantum optics or photonic crystals
• CPC Class Codes: H01S 5/0421 characterised by the semiconducting contacting layers electrodes H01S5/0425
• CPC Class Codes: H01S 5/18311 using selective oxidation
• CPC Class Codes: H01S 5/18338 Non-circular shape of the structure
• CPC Class Codes: H01S 5/18341 Intra-cavity contacts
• CPC Class Codes: H01S 5/18355 having a defined polarisation
• CPC Class Codes: H01S 5/18369 based on dielectric materials
• CPC Class Codes: H01S 5/34313 with a well layer having only As as V-compound, e.g. AlGaAs, InGaAs

Abstract

A surface emitting semiconductor device comprises: a semiconductor region including an active layer; a first DBR having first layers and second layers; and a second DBR. The first and second layers are alternately arranged, and the first layers are made of dielectric material. The first DBR, semiconductor region and second DBR are sequentially arranged along a predetermined axis, and the semiconductor region is provided between the first DBR and the second DBR. The cross section of the first DBR is taken along a reference plane perpendicular to the predetermined axis. The distance between two points on an edge of the cross section takes a first value in a direction of an X-axis of a two-dimensional XY orthogonal coordinate system defined on the reference plane, and the distance between two points on the edge takes a second value in a direction of a Y-axis of the above coordinate system. The first value is different from the second value. The cross section of the second DBR is taken along another reference plane perpendicular to the predetermined axis, and a shape of the cross section of the first DBR is different from a shape of the cross section of the second DBR.

Claims

1. A surface emitting semiconductor device comprising:

a semiconductor region including an active layer;

a first distributed Bragg reflector including first layers and second layers, the first layers and second layers being alternately arranged, and the first layers being made of dielectric material; and

a second distributed Bragg reflector, the first distributed Bragg reflector, the semiconductor region and the second distributed Bragg reflector being sequentially arranged along a predetermined axis;

wherein a cross section of the first distributed Bragg reflector is taken along a reference plane perpendicular to the predetermined axis, a distance between two points on an edge of the cross section takes a first value in a direction of an X-axis of a two-dimensional XY orthogonal coordinate system defined on the reference plane, a distance between two points on the edge takes a second value in a direction of a Y-axis of the two-dimensional XY orthogonal coordinate system, the first value is different from the second value, a cross section of the second distributed Bragg reflector is taken along another reference plane perpendicular to the predetermined axis, and a shape of the cross section of the first distributed Bragg reflector is different from a shape of the cross section of the second distributed Bragg reflector.

2. The surface emitting semiconductor device according to claim 1, wherein the first value is maximum.

3. The surface emitting semiconductor device according to claim 1, wherein the second value is minimum.

4. The surface emitting semiconductor device according to claim 1, wherein the shape of the cross section of the first distributed Bragg reflector is rectangular.

5. The surface emitting semiconductor device according to claim 1, wherein the shape of the cross section of the first distributed Bragg reflector is elliptic.

6. The surface emitting semiconductor device according to claim 1, wherein the active layer has a quantum well structure.

7. The surface emitting semiconductor device according to claim 1, wherein the semiconductor region has a first surface and a second surface, the first surface is opposite to the second surface, the first surface has a first area and a second area, and the first distributed Bragg reflector is provided on the first area.

8. The surface emitting semiconductor device according to claim 7, wherein the first distributed Bragg reflector is in contact with the first area.

9. The surface emitting semiconductor device according to claim 1, wherein the second distributed Bragg reflector includes a plurality of semiconductor layers.

10. The surface emitting semiconductor device according to claim 1, wherein the first distributed Bragg reflector applies tensile stress to the active layer.

11. The surface emitting semiconductor device according to claim 1, wherein the first distributed Bragg reflector applies compressive stress to the active layer.

12. The surface emitting semiconductor device according to claim 1, wherein the semiconductor region includes a current confinement layer provided between the active layer and the first distributed Bragg reflector, the current confinement layer includes a current blocking layer and a filling layer, the current blocking layer has an opening, and the filling layer is provided in the opening.

13. The surface emitting semiconductor device according to claim 1, wherein the semiconductor region includes a current confinement layer provided between the active layer and the first distributed Bragg reflector, the current confinement layer includes a carrier confinement structure having a tunnel junction.

14. The surface emitting semiconductor device according to claim 1, further comprising a conductive substrate,

wherein the semiconductor region has a mesa, the mesa is provided on the conductive substrate, and the mesa includes a contact layer, the active layer and the second distributed Bragg reflector sequentially arranged along the predetermined axis.

15. The surface emitting semiconductor device according to claim 1, wherein the surface emitting semiconductor device includes a laser diode and the laser diode emits a polarized laser beam.

16. The surface emitting semiconductor device according to claim 1, wherein the first and second layers are made of silicon oxide and amorphous silicon, respectively.

17. The surface emitting semiconductor device according to claim 1, wherein the first and second layers are made of Al₂O₃ and TiO₂, respectively.

18. The surface emitting semiconductor device according to claim 1, wherein the first and second layers are made of Al₂O₃ and ZnS, respectively.

19. A surface emitting semiconductor device comprising:

a first distributed Bragg reflector having a plurality of dielectric layers;

a second distributed Bragg reflector; and

a semiconductor active layer provided between the first distributed Bragg reflector and the second distributed Bragg reflector,

wherein a cross section of the first distributed Bragg reflector is taken along a reference plane perpendicular to the predetermined axis, a shape of the cross section of the first distributed Bragg reflector being asymmetrical cross-section geometry by reference to an optical axis of the surface emitting semiconductor device.

20. The surface emitting semiconductor device according to claim 19, wherein the shape of the cross section of the first distributed Bragg reflector is one of rectangle and ellipse.