Method and apparatus to generate a clock-based transmission
First Claim
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1. A method comprising:
- receiving a direct sequence ultrawide bandwidth signal; and
extracting data from said direct sequence ultrawide bandwidth signal using said digitally produced clock signal, wherein extracting said data comprises;
digitally producing a clock signal;
delaying said digitally produced clock signal to produce a delayed clock signal, wherein said delayed clock signal is synchronized with said direct sequence ultrawide bandwidth signal; and
mixing said delayed clock signal with said direct sequence ultrawide bandwidth signal to obtain said data.
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Abstract
A method and apparatus are disclosed to generate and/or receive ultra-wide bandwidth (UWB) pulses using a digital clock.
21 Citations
18 Claims
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1. A method comprising:
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receiving a direct sequence ultrawide bandwidth signal; and
extracting data from said direct sequence ultrawide bandwidth signal using said digitally produced clock signal, wherein extracting said data comprises;
digitally producing a clock signal;
delaying said digitally produced clock signal to produce a delayed clock signal, wherein said delayed clock signal is synchronized with said direct sequence ultrawide bandwidth signal; and
mixing said delayed clock signal with said direct sequence ultrawide bandwidth signal to obtain said data. - View Dependent Claims (2, 3, 4, 5, 6)
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7. An apparatus, comprising:
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a digital clock to produce a digital clock signal;
a receiver to receive a direct sequence ultrawide bandwidth signal;
a variable digital delay circuit to delay said digital clock signal to produce a delayed clock signal, wherein said delayed clock signal is synchronized with said direct sequence ultrawide bandwidth signal; and
a mixer to mix said delayed clock signal with said direct sequence ultrawide bandwidth signal to obtain data. - View Dependent Claims (8, 9, 10, 11, 12)
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13. A system, comprising:
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an antenna;
a digital clock to produce a digital clock signal;
a receiver operably coupled to said antenna to receive a direct sequence ultrawide bandwidth signal;
a variable digital delay circuit to delay said digital clock signal to produce a delayed clock signal, wherein said delayed clock signal is synchronized with said direct sequence ultrawide bandwidth signal; and
a mixer to mix said delayed clock signal with said direct sequence ultrawide bandwidth signal to obtain data. - View Dependent Claims (14, 15, 16, 17, 18)
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Specification
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Current AssigneeIntel Corporation
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Original AssigneeIntel Corporation
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InventorsGreen, Evan, Foerster, Jeffrey, Ho, Minnie
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Application NumberUS11/902,992Publication NumberTime in Patent OfficeDaysField of SearchUS Class Current375/146CPC Class CodesH04B 1/69 Spread spectrum techniques
