METHODS AND SYSTEMS FOR PROVIDING RECONFIGURABLE AND RECOVERABLE COMPUTING RESOURCES

• US 20080022151A1
• Filed: 07/18/2006
• Published: 01/24/2008
• Est. Priority Date: 07/18/2006
• Status: Active Grant

• Current Assignee: Honeywell International Inc.
• Original Assignee: Honeywell International Inc.
• Inventors: Stange, Kent, Hess, Richard, Rogers, Randy, Kelley, Gerald B.
• Granted Patent: US 7,793,147 B2
• Time in Patent Office: Days
• US Class Current: 714/10
• CPC Class Codes: G06F 11/1494 N-modular type
• CPC Class Codes: G06F 11/18 using passive fault-masking of the redundant circuits error detection by comparing the output of redundant processing systems with continued operation after detection of the error G06F11/165

Abstract

A method for optimizing the use of digital computing resources to achieve reliability and availability of the computing resources is disclosed. The method comprises providing one or more processors with a recovery mechanism, the one or more processors executing one or more applications. A determination is made whether the one or more processors needs to be reconfigured. A rapid recovery is employed to reconfigure the one or more processors when needed. A computing system that provides reconfigurable and recoverable computing resources is also disclosed. The system comprises one or more processors with a recovery mechanism, with the one or more processors configured to execute a first application, and an additional processor configured to execute a second application different than the first application. The additional processor is reconfigurable with rapid recovery such that the additional processor can execute the first application when one of the one more processors fails.

Claims

1. A method for optimizing the use of digital computing resources to achieve reliability and availability of the digital computing resources, the method comprising:

providing one or more processors with a recovery mechanism, the one or more processors executing one or more applications;

determining whether the one or more processors needs to be reconfigured; and

employing a rapid recovery to reconfigure the one or more processors when needed.

2. The method of claim 1, wherein state data is continuously updated in the recovery mechanism.

3. The method of claim 2, wherein the state data is used to transfuse the one or more processors for reconfiguration.

4. The method of claim 1, wherein the method provides real-time reconfiguration transitions.

5. The method of claim 1, wherein the method provides for a minimal set of hardware to achieve reliability and availability for functions being provided.

6. An electronic system architecture that is configured to implement the method of claim 1 to provide for optimizing the use of digital computing resources.

7. A computing system that provides reconfigurable and recoverable computing resources, the system comprising:

one or more processors with a recovery mechanism and configured to execute a first application;

a first additional processor configured to execute a second application different than the first application;

wherein the additional processor is reconfigurable with rapid recovery such that the additional processor can execute the first application when one of the one more processors fails.

8. The system of claim 7, wherein the one or more processors are in operative communication with a decision logic module prior to any failure.

9. The system of claim 8, wherein the decision logic module implements an algorithm that maintains an appropriate action in the event that one of the one or more processors sends an erroneous output to the decision logic module.

10. The system of claim 8, wherein the additional processor is in operative communication with the decision logic module when the additional processor is reconfigured, and a failed processor is removed from communication with the decision logic module.

11. The system of claim 7, wherein the additional processor is reconfigured with recovery data from a processor that has not failed to maintain a level of redundancy.

12. The system of claim 7, wherein the recovery mechanism in the one or more processors stores state data relevant to executing the first application.

13. The system of claim 12, wherein the state data is used to reconfigure the additional processor.

14. The system of claim 7, further comprising a second additional processor configured to execute a third application different from the first and second applications.

15. The system of claim 14, wherein the second additional processor is reconfigurable such that it can execute the second application if the first additional processor fails.

16. The system of claim 14, wherein the second additional processor is reconfigured with a consistent set of state data from a recovery mechanism of the first additional processor.

17. A computing system that provides reconfigurable and recoverable computing resources, the system comprising:

a first processor with a recovery mechanism, the first processor configured to execute a first application; and

one or more additional processors configured to execute one or more applications that are different from the first application;

wherein the one or more additional processors are reconfigurable such that they can execute the first application when needed for redundancy, and wherein the one or more additional processors can be further reconfigured to execute the one or more applications again that are different from the first application when redundancy is no longer required.

18. The system of claim 17, wherein state data is continuously updated in the recovery mechanism of the first processor.

19. The system of claim 18, wherein the one or more additional processors are reconfigured with a consistent set of state data from the recovery mechanism of the first processor.

20. The system of claim 17, wherein the first processor and the one or more additional processors are in operative communication with a decision logic module after reconfiguration of the one or more additional processors.