Method and apparatus for adjusting a reference

• US 20080024105A1
• Filed: 07/25/2006
• Published: 01/31/2008
• Est. Priority Date: 07/25/2006
• Status: Active Grant

• Current Assignee: Power Integrations Incorporated
• Original Assignee: Power Integrations Incorporated
• Inventors: Wang, Zhao-Jun
• Granted Patent: US 7,397,231 B2
• Time in Patent Office: Days
• US Class Current: 323/315
• CPC Class Codes: G05F 3/262 using field-effect transistors only

Abstract

Examples of a method and apparatus for adjusting a reference are disclosed. In one aspect of the invention, a circuit includes a current divider to divide a current from a current source into a first current and a reference current. The circuit also includes a current mirror coupled to the current divider to receive the first current from the current divider and to receive an adjustment current. The adjustment current is to set the reference current.

Claims

1. A circuit, comprising:

a current divider to divide a current from a current source into a first current and a reference current; and

a current mirror coupled to the current divider to receive the first current from the current divider and to receive an adjustment current, the adjustment current to set the reference current.

2. The circuit of claim 1 further comprising a resistor coupled to receive the reference current from the current divider to provide a reference voltage.

3. The circuit of claim 1 wherein the current divider includes a first transistor and a second transistor, wherein a first terminal of the first transistor is coupled to a first terminal of the second transistor.

4. The circuit of claim 3 wherein the first and the second transistor have respective strengths related by a ratio of (1−

r);

r, wherein r is less than one.

5. The circuit of claim 1 wherein the reference current is adjustable between a full value and a fraction of the full value in response to the adjustment current.

6. The circuit of claim 5 wherein a change in the reference current and a change in the adjustment current are proportional when the adjustment current is between an upper and a lower threshold value.

7. The circuit of claim 6 wherein the first current is the current from the current source multiplied by (1−

r) when the adjustment current is greater than the upper threshold value.

8. The circuit of claim 6 wherein the value of the first current is zero when a value of the adjustment current is less than the lower threshold value.

9. The circuit of claim 1 wherein the current from the current source is the sum of the first current and the reference current.

10. The circuit of claim 1 wherein the current mirror includes a third transistor and a fourth transistor with respective strengths of the ratio 1:

M.

11. The circuit of claim 10 where the third and the fourth transistors include metal oxide semiconductor field effect transistors (MOSFETs).

12. The circuit of claim 10 wherein the third transistor is coupled to receive the adjustment current.

13. The circuit of claim 3 wherein the transistors in the current divider include metal oxide semiconductor field effect transistors (MOSFETs).

14. The circuit of claim 1 wherein the circuit is included in an integrated circuit.

15. The circuit of claim 14 wherein the integrated circuit is coupled to control a power supply.

16. A method, comprising:

dividing a source current into a first current and a second current such that a sum of the first and the second current is substantially equal to the source current;

mirroring an adjustment current into the first current; and

adjusting the second current in response to the adjustment current.

17. The method of claim 16 wherein adjusting the second current includes adjusting a reference current between a full value and a fraction of a full reference current value.

18. The method of claim 17 further comprising generating a reference voltage from the reference current.

19. The method of claim 16 further comprising receiving the source current from a current source.

20. The method of claim 16 further comprising reducing an input current by a first threshold current to produce the adjustment current.