Configurable embedded multi-port memory
First Claim
1. A programmable routing structure to couple nodes between physical and logical domains, comprising:
- N nodes in a physical domain, where N is an integer greater than one; and
N nodes in a logical domain, said nodes arranged in a plurality of sets, each said set comprising a different number of nodes between one and N; and
a plurality of routing devices, each device comprising a unique coupling scheme between the N nodes in said physical domain and the nodes of a said logical domain set, each said routing device further comprising;
a configuration element to activate or deactivate the routing device; and
a fixed input or an address signal to selectively couple the physical domain set nodes to logical domain N nodes.
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Abstract
Programmable routing structures to couple physical memory nodes to logical memory nodes in embedded multi-port memory FPGA'"'"'s are disclosed. In a first embodiment, a plurality of physical domain nodes couples a plurality of variable node sets in a logical read domain, wherein a configuration element activates one of the sets and selects a fixed input or an address signal to decode the data read. In a second embodiment, a plurality of physical domain nodes couples a plurality of variable node sets in a logical write domain, wherein a configuration element activates one of the sets and couples a fixed input or an address signal to an enable signal of a driver device to decode the data written. A third embodiment provide logical read and logical write functions for a single port in a multi-port physical memory array, wherein the logical read data width and the logical write data width can be independently configured, and wherein the read and write functions share common address lines.
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Citations
20 Claims
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1. A programmable routing structure to couple nodes between physical and logical domains, comprising:
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N nodes in a physical domain, where N is an integer greater than one; and N nodes in a logical domain, said nodes arranged in a plurality of sets, each said set comprising a different number of nodes between one and N; and a plurality of routing devices, each device comprising a unique coupling scheme between the N nodes in said physical domain and the nodes of a said logical domain set, each said routing device further comprising; a configuration element to activate or deactivate the routing device; and a fixed input or an address signal to selectively couple the physical domain set nodes to logical domain N nodes. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A programmable routing structure to couple nodes between logical and physical domains, comprising:
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N nodes in a logical domain, said nodes arranged in M sets, where N and M are integers greater than one, each said set comprising a different number of nodes between one and N; and N nodes in a physical domain, each node coupled to an output of a driver, each said driver further comprising; an input, and an enable signal comprising two signal levels, wherein a first level tri-states said output and a second level generates an output from said input; and M routing devices, each routing device comprising; a plurality of coupling devices to uniquely couple the nodes of a said logical domain set to the N inputs of said drivers; and a configuration bit to activate or deactivate the plurality of coupling devices; wherein, said configuration bits further couple a fixed input or an address signal to each of said enable signals to selectively couple logical domain nodes to physical domain nodes. - View Dependent Claims (10, 11, 12, 13, 14, 15, 16)
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17. A programmable routing structure to couple physical nodes to logical read and write domains at a single port in a multi-port embedded memory array, comprising:
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a plurality of physical domain nodes; and a plurality of logical read domain nodes arranged in a plurality of sets, each set comprising a different number of nodes; and a plurality of logical write domain nodes arranged in a plurality of sets, each set comprising a different number of nodes; and a plurality of routing devices, each said device to couple nodes in a set of said logical read and write domains to the physical domain nodes, wherein; a single read domain set and a single write domain set comprising the same or a different number of nodes is selected by one or more configuration elements; and a common address signal selectively couple the nodes in said selected logical read and write domain sets to the physical domain nodes. - View Dependent Claims (18, 19, 20)
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Specification