Interface circuit system and method for autonomously performing power management operations in conjunction with a plurality of memory circuits
First Claim
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1. A sub-system, comprising:
- an interface circuit in communication with a plurality of memory circuits and a system, the interface circuit operable to interface the memory circuits and the system for autonomously performing a power management operation in association with at least a portion of the memory circuits.
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Accused Products
Abstract
A memory circuit power management system and method are provided. In use, an interface circuit is in communication with a plurality of memory circuits and a system. The interface circuit is operable to interface the memory circuits and the system for autonomously performing a power management operation in association with at least a portion of the memory circuits.
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Citations
20 Claims
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1. A sub-system, comprising:
an interface circuit in communication with a plurality of memory circuits and a system, the interface circuit operable to interface the memory circuits and the system for autonomously performing a power management operation in association with at least a portion of the memory circuits. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18)
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19. A method, comprising:
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interfacing a plurality of memory circuits and a system; and autonomously performing a power management operation in association with at least a portion of the memory circuits.
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20. A system, comprising:
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a plurality of memory circuits; and an interface circuit in communication with the memory circuits and a system, the interface circuit operable to interface the memory circuits and the system for autonomously performing a power management operation in association with at least a portion of the memory circuits.
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Specification