SYSTEM AND METHOD FOR STORING AT LEAST A PORTION OF INFORMATION RECEIVED IN ASSOCIATION WITH A FIRST OPERATION FOR USE IN PERFORMING A SECOND OPERATION
First Claim
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1. A method, comprising:
- receiving first information in association with a first operation to be performed on at least one of a plurality of memory circuits;
storing at least a portion of the first information;
receiving second information in association with a second operation to be performed on at least one of the plurality of memory circuits; and
performing the second operation utilizing the stored portion of the first information in addition to the second information.
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Abstract
A system and method are provided for use in the context of a plurality of memory circuits. In use, first information is received in association with a first operation to be performed on at least one of the memory circuits. At least a portion of the first information is stored. Still yet, second information is received in association with a second operation to be performed on at least one of the plurality of memory circuits. To this end, the second operation may be performed utilizing the stored portion of the first information in addition to the second information.
263 Citations
20 Claims
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1. A method, comprising:
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receiving first information in association with a first operation to be performed on at least one of a plurality of memory circuits; storing at least a portion of the first information; receiving second information in association with a second operation to be performed on at least one of the plurality of memory circuits; and performing the second operation utilizing the stored portion of the first information in addition to the second information. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18)
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19. A method, comprising:
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receiving a first set of address bits in association with a row operation; storing at least a portion of the first set of address bits; receiving a second set of address bits in association with a column operation; and performing the column operation utilizing the stored portion of the first set of address bits in addition to the second set of address bits.
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20. A sub-system, comprising:
a circuit in communication with a plurality of memory circuits and a system, the circuit operable to store at least a portion of information received in association with a first operation for use in performing a second operation.
Specification