Electronic packages with roughened wetting and non-wetting zones

• US 20080026505A1
• Filed: 07/28/2006
• Published: 01/31/2008
• Est. Priority Date: 07/28/2006
• Status: Abandoned Application

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Chakrapani, Nirupama
• Application Number:
  US11/494,858
• Publication Number:
  US 20080026505A1
• Time in Patent Office: Days
• US Class Current: 438/106
• CPC Class Codes: H01L 21/563 Encapsulation of active face of flip-chip device, e.g. underfilling or underencapsulation of flip-chip, encapsulation preform on chip or mounting substrate
• CPC Class Codes: H01L 2224/0401 Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
• CPC Class Codes: H01L 2224/16 of an individual bump connector
• CPC Class Codes: H01L 2224/32145 the bodies being stacked
• CPC Class Codes: H01L 2224/32225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/45015 being circular
• CPC Class Codes: H01L 2224/45099 Material
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/73203 Bump and layer connectors
• CPC Class Codes: H01L 2224/73204 the bump connector being embedded into the layer connector
• CPC Class Codes: H01L 2224/73215 Layer and wire connectors
• CPC Class Codes: H01L 2224/73265 Layer and wire connectors
• CPC Class Codes: H01L 2225/0651 Wire or wire-like electrical connections from device to substrate
• CPC Class Codes: H01L 23/3128 the substrate having spherical bumps for external connection
• CPC Class Codes: H01L 23/3142 Sealing arrangements between parts, e.g. adhesion promotors
• CPC Class Codes: H01L 24/48 of an individual wire connector
• CPC Class Codes: H01L 24/73 Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
• CPC Class Codes: H01L 25/0657 Stacked arrangements of devices
• CPC Class Codes: H01L 25/50 Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group H01L27/00 or H01L29/00 H01L21/50 takes precedence
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00011 : Not relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00012 : Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01067 : Holmium [Ho]
• CPC Class Codes: H01L 2924/14 : Integrated circuits
• CPC Class Codes: H01L 2924/15311 : being a ball array, e.g. BGA
• CPC Class Codes: H01L 2924/181 : Encapsulation
• CPC Class Codes: H01L 2924/207 : Diameter ranges

Abstract

The flow of polymer formulations in in integrated circuit packages can be controlled by altering the roughness and surface chemistry of package surfaces. The surface roughness can be altered by forming protrusions having a dimension less than 500 nanometers and their chemistry can be controlled by chemical or plasma treatment. Hydrophilic surfaces may be made hemi-wicking and hydrophobic surfaces may be super-hydrophobic by particles of the same general characteristics.

Claims

1. A method comprising:

forming a semiconductor integrated circuit package surface;

forming protrusions on said surface having a dimension less than 500 nanometers; and

applying a liquid to said package surface.

2. The method of claim 1 including forming said protrusions on said surface in two different regions such that one region is hydrophobic and the other region is hydrophilic.

3. The method of claim 2 including forming a semiconductor integrated package surface in the form of a package substrate.

4. The method of claim 3 including forming said protrusions of substantially similar dimensions.

5. The method of claim 1 including forming protrusions by bombarding the surface.

6. The method of claim 5 wherein applying a liquid includes providing a die over said substrate, and injecting underfill material between said die and said substrate.

7. The method of claim 6 including defining a keep out zone on said substrate using hydrophobic particles around said die and providing a region of hydrophilic particles between said die and said substrate.

8. The method of claim 1 including forming said surface of an integrated circuit die and treating said protrusions so that said protrusions are hydrophobic in one area and hydrophilic in another.

9. The method of claim 8 including providing a die attach to said surface such that said hydrophobic protrusions reduce bleeding out of the die attach material.

10. The method of claim 1 including coating said protrusions with a silane.

11. An integrated circuit package comprising:

a package surface;

protrusions formed on said surface having a dimension less than 500 nanometers; and

a liquid applied over said protrusions.

12. The package of claim 11 wherein said protrusions are hydrophobic.

13. The package of claim 11 wherein said protrusions are hydrophilic.

14. The package of claim 11 wherein some of those protrusions are hydrophilic and some of said particles are hydrophobic.

15. The package of claim 11 wherein said liquid is underfill.

16. The package of claim 11 wherein said liquid is die attach.

17. The package of claim 11 wherein said surface is a die surface.

18. The package of claim 11 wherein said surface is a package substrate surface.

19. The package of claim 18 wherein hydrophilic protrusions are formed on said substrate, a die positioned over said substrate, said hydrophobic protrusions being formed on said substrate around said die, the surface of said substrate under said die having protrusions formed thereon that are hydrophilic and solder balls being provided between said die and said substrate.

20. The package of claim 11 wherein said surface is a die surface and a die attach is attached to said die surface, the region contacting said die attach being hydrophilic and a region around said die attach being hydrophobic.

21. The package of claim 11 wherein said protrusions are silane coated.

22. An integrated circuit package comprising:

a package surface having protrusions on said surface having a dimension less than 500 nanometers; and

said surface having a surface energy of greater than or equal to 70 mN/m or less than or equal to 20 mN/m.

23. The package of claim 22 wherein said surface includes both hydrophilic and hydrophobic regions.

24. The package of claim 22 wherein said surface is a die surface.

25. The package of claim 22 wherein said surface is a substrate surface.

26. The package of claim 22 wherein said surface is partially covered with underfill, a die being positioned to sandwich the underfill between said die and said surface.

27. The package of claim 22 including a substrate and a die stacked on said substrate, die attach being positioned between said substrate and said die, said die attach being surrounded by a region of said surface that is hydrophobic and said die contacting a hydrophilic region of said surface.

28. The package of claim 22 wherein said protrusions are silane coated.

29. The package of claim 28 wherein said silane coated protrusions are hydrophobic.

30. The package of claim 28 wherein said silane coated protrusions are hydrophilic.