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NONVOLATILE MEMORY CELL COMPRISING A REDUCED HEIGHT VERTICAL DIODE

  • US 20080026510A1
  • Filed: 10/02/2007
  • Published: 01/31/2008
  • Est. Priority Date: 12/19/2002
  • Status: Active Grant
First Claim
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1. A method for forming a monolithic three dimensional memory array, the method comprising:

  • i) forming a first memory level, the steps for forming the first memory level comprising;

    a) forming a plurality of substantially parallel, substantially coplanar first conductors above a substrate;

    b) forming a plurality of substantially parallel, substantially coplanar second conductors above the first conductors;

    c) forming a plurality of first vertically oriented pillars, each first pillar comprising a first junction diode and disposed between one of the first conductors and one of the second conductors, wherein the first junction diodes have a first height between about 500 angstroms and about 3500 angstroms; and

    ii) monolithically forming a second memory level on the first memory level.

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