Capacitive microaccelerometers and fabrication methods

• US 20080028857A1
• Filed: 09/28/2007
• Published: 02/07/2008
• Est. Priority Date: 06/03/2005
• Status: Active Grant

• Current Assignee: Babak Amini, Farrokh Ayazi, Reza Abdolvand
• Original Assignee: Babak Amini, Farrokh Ayazi, Reza Abdolvand
• Inventors: Amini, Babak, Abdolvand, Reza, Ayazi, Farrokh
• Granted Patent: US 7,757,393 B2
• Time in Patent Office: Days
• US Class Current: 73/514.32
• CPC Class Codes: B81B 2201/0235 Accelerometers
• CPC Class Codes: B81C 1/00182 Arrangements of deformable or non-deformable structures, e.g. membrane and cavity for use in a transducer
• CPC Class Codes: G01P 15/0802 Details
• CPC Class Codes: G01P 15/125 by capacitive pick-up
• CPC Class Codes: G01P 2015/0814 for translational movement of the mass, e.g. shuttle type
• CPC Class Codes: Y10T 29/49156 with selective destruction of conductive paths

Abstract

Disclosed are moveable microstructures comprising in-plane capacitive microaccelerometers, with submicro-gravity resolution (<200 ng/√Hz) and very high sensitivity (>17 pF/g). The microstructures are fabricated in thick (>100 μm) silicon-on-insulator (SOI) substrates or silicon substrates using a two-mask fully-dry release process that provides large seismic mass (>10 milli-g), reduced capacitive gaps, and reduced in-plane stiffness. Fabricated devices may be interfaced to a high resolution switched-capacitor CMOS IC that eliminates the need for area-consuming reference capacitors. The measured sensitivity is 83 mV/mg (17 pF/g) and the output noise floor is −91 dBm/Hz at 10 Hz (corresponding to an acceleration resolution of 170 ng/√Hz). The IC consumes 6 mW power and measures 0.65 mm² core area.

Claims

1. A method of fabricating a moveable microstructure, comprising:

providing a substrate having upper and lower layers;

etching trenches in the upper layer to define bonding pads, sense electrodes and a proof mass having capacitive gaps formed therebetween, and a plurality of tethers that allow the proof mass to move;

depositing a conformal conductive layer on the substrate to reduce sizes of the capacitive gaps;

etching the conformal conductive layer to remove conformal conductive material at the bottom of the trenches and provide isolation between the bonding pads and the sense electrodes; and

etching the lower layer of the substrate to form extra proof mass that is coupled to the proof mass formed in the upper layer.

2. The method recited in claim 1 wherein the conformal conductive layer is doped to reduce its electrical resistance.

3. The method recited in claim 1 further comprising:

masking and etching the back side of the proof mass to reduce its height.

4. The method recited in claim 1 wherein the substrate comprises a silicon-on-insulator substrate.

5. The method recited in claim 1 wherein the substrate comprises a silicon substrate.

6. A method of fabricating a moveable microstructure, comprising:

providing a low resistivity silicon-on-insulator substrate;

etching trenches on the front side of the substrate to define bonding pads, sense electrodes and a proof mass having capacitive gaps formed therebetween;

depositing a conformal conductive layer on the substrate to reduce capacitive gap sizes;

doping the conformal conductive layer;

etching the conformal conductive layer to remove material at the bottom of the trenches; and

etching the back side of the substrate to provide additional proof mass and to release the 10 microstructure.

7. The method recited in claim 6 further comprising:

growing a thermal silicon oxide layer on both sides of the substrate;

patterning the oxide layer on the both sides of the substrate to form an etch mask;

8. A method of fabricating a moveable microstructure, comprising:

providing a silicon substrate;

etching trenches on the front side of the substrate to define pads, sense electrodes and a proof mass having capacitive gaps formed therebetween;

depositing a conformal conductive layer on the substrate to reduce capacitive gap sizes;

bonding a handle substrate to the top side of the silicon substrate;

etching the back side of the substrate to provide additional proof mass and to release the microstructure by etching the conformal conductive layer to remove material at the bottom of the trenches; and

forming electrical connections through via holes in the handle substrate to the conformal conductive layer adjacent to pads defined in the silicon substrate.

9. The method recited in claim 8 wherein the bonded handle substrate comprises an oxidized silicon substrate.