Failsafe mechanism for preventing an integrated circuit from overheating

• US 20080031303A1
• Filed: 10/01/2007
• Published: 02/07/2008
• Est. Priority Date: 03/11/2003
• Status: Active Grant

• Current Assignee: Jonathan Douglas, Scott Bowden
• Original Assignee: Jonathan Douglas, Scott Bowden
• Inventors: Douglas, Jonathan, Bowden, Scott
• Granted Patent: US 7,690,843 B2
• Time in Patent Office: Days
• US Class Current: 374/163
• CPC Class Codes: G01K 3/005 Circuits arrangements for indicating a predetermined temperature fire detection G08B17/00
• CPC Class Codes: G06F 1/206 comprising thermal management
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

Techniques for preventing an integrated circuit (IC) from overheating are described herein. According to one embodiment, an exemplary process includes detecting whether a temperature of an integrated circuit (IC) exceeds a threshold independent of an operating state of the IC, and removing at least a portion of a power from the IC if the temperature of the IC exceeds the threshold. Other methods and apparatuses are also described.

Claims

1. A method, comprising:

detecting whether a power level from a power source reaches a predetermined threshold;

detecting, subsequent to performing the detecting the power level reaches the predetermined threshold, whether a temperature of an integrated circuit (IC) powered by the power source exceeds a threshold independent of an operating state of the IC; and

removing at least a portion of a power from the IC if the temperature of the IC exceeds the threshold.

2. The method of claim 1, wherein the detecting whether the temperature of the IC exceeds the threshold is performed while the IC is in a reset state.

3. The method of claim 1, wherein the detecting whether the temperature of the IC exceeds the threshold is performed as soon as the IC comes out of a reset state.

4. The method of claim 1, further comprising configuring one or more thermal sensors prior to the detecting whether the temperature of the IC exceeds the threshold, the configuring being performed based on a thermal configuration associated with the IC.

5. The method of claim 4, wherein the configuring comprises:

reading thermal configuration data from a PROM of the IC, the thermal configuration data being associated with the IC; and

shifting the thermal configuration data to a register of the one or more thermal sensors, wherein the detecting whether the temperature of the IC exceeds the threshold is performed based on the thermal configuration data.

6. The method of claim 4, further comprising asserting a first signal when the configuration of the one or more thermal sensors is completed.

7. The method of claim 6, further comprising:

stalling the detection for a period of time in response to the first signal to allow the one or more thermal sensors to be stable; and

asserting a second signal after the period of time expires to indicate the one or more thermal sensors are stable.

8. The method of claim 7, further comprising generating a third signal to indicate whether the temperature of the IC exceeds the threshold based on readings of the one or more thermal sensors in response to the second signal.

9. The method of claim 8, wherein the removing at least a portion of a power from the IC is performed based on the third signal.

10. The method of claim 1, further comprising detecting whether a clock signal is stable prior to performing the detecting whether the temperature of the IC exceeds the threshold, the IC being driven by the clock signal.

11. The method of claim 1, further comprising generating the clock signal to control the detecting whether the temperature of the IC exceeds the threshold.

12. The method of claim 11, wherein the generating comprises:

detecting whether an external clock exists;

deriving the clock signal from the external clock if the external clock source exists; and

generating the clock signal from an internal clock if the external clock source does not exist.

13. The method of claim 11, further comprising generating a signal to indicate whether the clock signal is stable.

14. An integrated circuit, comprising:

a clock detecting logic for detecting whether a clock signal driving the integrated circuit (IC) is stable;

a thermal sensor coupled to the clock detecting logic to detect, subsequent to the clock signal is detected to be stable, whether a temperature of the IC exceeds a threshold independent of an operating state of the IC; and

an input or output (IO) control logic coupled to the thermal sensor to transmit a signal to remove at least a portion of a power from the IC if the temperature of the IC exceeds the threshold.

15. The integrated circuit of claim 14, wherein whether the clock signal is stable is detected while the IC is in a reset state.

16. The integrated circuit of claim 14, further comprising:

a configuration logic coupled to the thermal sensor for configuring, based on a thermal configuration associated with the IC the thermal sensor prior to the thermal sensor detecting whether the temperature of the IC exceeds the threshold.

17. The integrated circuit of claim 16, wherein the configuration logic comprises:

an input logic for reading thermal configuration data from a PROM of the IC, the thermal configuration data being associated with the IC; and

a shift logic for shifting the thermal configuration data to a register of the thermal sensor, wherein whether the temperature of the IC exceeds the threshold is detected based on the thermal configuration data.

18. The integrated circuit of claim 16, wherein the configuration logic asserts a first signal when the thermal sensor is completely configured.

19. The integrated circuit of claim 18, further comprising:

a delay logic for stalling the detection for a period of time in response to the first signal to allow the thermal sensor to be stable, wherein the delay logic asserts a second signal after the period of time expires to indicate the thermal sensor is stable.

20. The integrated circuit of claim 19, wherein the thermal sensor generates a third signal to indicate whether the temperature of the IC exceeds the threshold in response to the second signal.

21. The integrated circuit of claim 20, wherein the IO control logic transmits the signal to remove the power from the IC based on the third signal.

22. The integrated circuit of claim 14, further comprising:

a power detection logic to detect whether a power level from a power source powering the IC reaches a predetermined level prior to the thermal sensor detecting whether the temperature of the IC exceeds the threshold.

23. The integrated circuit of claim 14, further comprising:

a clock generating logic to generate the clock signal to control the thermal sensor for detecting whether the temperature of the IC exceeds the threshold.

24. The integrated circuit of claim 23, wherein the clock generating logic comprises:

an external clock detecting logic for detecting whether an external clock exists;

a clock deriving logic to derive the clock signal from the external clock if the external clock source exists; and

an internal clock generating logic for generating the clock signal from an internal clock if the external clock source does not exist.

25. A data processing system, comprising:

a memory; and

a processor coupled to the memory, the processor including;

a clock detecting logic for detecting whether a clock signal driving the processor is stable;

a power detecting logic for detecting whether a power level from a power source powering the processor reaches a predetermined level;

a thermal sensor to detect, subsequent to the clock signal is detected to be stable and the power level is detected to reach the predetermined level, whether a temperature of the processor exceeds a predetermined threshold independent of an operating state of the processor;

an input or output (IO) control logic coupled to the thermal sensor to transmit a signal, after a predetermined period of time when the clock signal is stable and the power level reaches the predetermined level, to remove at least a portion of a power from the processor if the temperature of the processor exceeds the predetermined threshold.