Radiation-Emitting Thin-Film Semiconductor Chip

• US 20080035941A1
• Filed: 09/26/2003
• Published: 02/14/2008
• Est. Priority Date: 09/26/2003
• Status: Active Grant

• Current Assignee: OSRAM OLED GMBH (Ams-Osram AG)
• Original Assignee: Osram Opto Semiconductors GmbH (Ams-Osram AG)
• Inventors: Harle, Volker
• Granted Patent: US 8,604,497 B2
• Time in Patent Office: Days
• US Class Current: 257/98
• CPC Class Codes: H01L 33/10 with a light reflecting structure, e.g. semiconductor Bragg reflector
• CPC Class Codes: H01L 33/20 with a particular shape, e.g. curved or truncated substrate
• CPC Class Codes: H01L 33/46 Reflective coating, e.g. dielectric Bragg reflector

Abstract

A radiation-emitting thin-film semiconductor chip with an epitaxial multilayer structure (12), which contains an active, radiation-generating layer (14) and has a first main face (16) and a second main face (18)—remote from the first main face—for coupling out the radiation generated in the active, radiation-generating layer. Furthermore, the first main face (16) of the multilayer structure (12) is coupled to a reflective layer or interface, and the region (22) of the multilayer structure that adjoins the second main face (18) of the multilayer structure is patterned one- or two-dimensionally with convex elevations (26).

Claims

1. A radiation-emitting thin-film semiconductor chip with an epitaxial multilayer structure, which contains an active, radiation-generating layer and has a first main face and a second main face—

remote from the first main face—

for coupling out the radiation generated in the active, radiation-generating layer, wherein

the first main face of the multilayer structure is coupled to a reflective layer or interface, and a region of the multilayer structure that adjoins the second main face of the multilayer structure is patterned one- or two-dimensionally.

2. The semiconductor chip as claimed in claim 1, wherein

a carrier element is coupled to the first main face and the reflective layer or interface is arranged between the carrier element and the multilayer structure.

3. The semiconductor chip as claimed in claim 1, wherein

the region of the multilayer structure that adjoins the second main face of the multilayer structure has convex elevations.

4. The semiconductor chip as claimed in claim 3, wherein

the elevations have the form of truncated pyramids or truncated cones or a trapezoidal cross-sectional form.

5. The semiconductor chip as claimed in claim 3, wherein

the elevations have the form of cones or a triangular cross-sectional form.

6. The semiconductor chip as claimed in claim 3, wherein

the elevations have the form of sphere segments or a circle segment cross-sectional form.

7. The semiconductor chip as claimed in claim 3,

the elevations have an inclination angle (β

) of between approximately 30° and

approximately 70°

.

8. The semiconductor chip as claimed in claim 7, wherein

the elevations have an inclination angle (β

) of between approximately 40° and

approximately 50°

.

9. The semiconductor chip as claimed in claim 3, wherein

the height (h1) of the elevations is at least as large as the distance (h2) between a non-patterned region of the multilayer structure and the active, radiation-generating layer.

10. The semiconductor chip as claimed in claim 9, wherein

the height (h1) of the elevations is approximately twice as large as the distance (h2) between the non-patterned region of the multilayer structure and the active, radiation-generating layer.

11. The semiconductor chip as claimed in claim 3, wherein

a cell size (d) of the elevations is at most approximately five times as large as the height (h1) of the elevations.

12. The semiconductor chip as claimed in claim 11, wherein

the cell size (d) of the elevations is at most approximately three times as large as the height (h1) of the elevations.

13. The semiconductor chip as claimed in claim 1, wherein

the layer or interface coupled to the first main area of the multilayer structure has a reflectivity of at least 70%.

14. The semiconductor chip as claimed in claim 1, wherein

the layer or interface coupled to the first main area of the multilayer structure has a reflectivity of at least 85%.

15. The semiconductor chip as claimed in claim 1, wherein

the multilayer structure is applied on a carrier substrate either directly by its first main face or via a reflective layer.

16. The semiconductor chip as claimed in claim 15, wherein

the reflective layer or the carrier substrate simultaneously serves as a contact layer of the semiconductor chip.

17. The semiconductor chip as claimed in claim 1, wherein

a conductive, transparent layer is applied on the second main face of the multilayer structure.

18. The semiconductor chip as claimed in claim 1, wherein

a transparent protective layer is applied on the second main face of the multilayer structure.

41. The semiconductor chip as claimed in claim 1, wherein

the multilayer structure contains a material or a plurality of different materials based on GaN.

19. A radiation-emitting thin-film semiconductor chip with an epitaxial multilayer structure, which contains an active, radiation-generating layer and has a first main face and a second main face—

remote from the first main face—

for coupling out the radiation generated in the active, radiation-generating layer, wherein

the first main face of the multilayer structure is coupled to a reflective layer or interface, and a transparent layer is provided between the first main face of the multilayer structure and the reflective layer or interface, said transparent layer being patterned one- or two-dimensionally.

20. The semiconductor chip as claimed in claim 19, wherein

the transparent layer is conductive.

21. The semiconductor chip as claimed in claim 19, wherein

the transparent layer between the first main face of the multilayer structure and the reflective layer or interface has convex elevations.

22. The semiconductor chip as claimed in claim 21, wherein

the elevations have the form of truncated pyramids or truncated cones or a trapezoidal cross-sectional form.

23. The semiconductor chip as claimed in claim 21, wherein

the elevations have an inclination angle (β

) of between approximately 30° and

approximately 70°

.

24. The semiconductor chip as claimed in claim 21, wherein

the elevations have an inclination angle (β

) of between approximately 40° and

approximately 50°

.

25. The semiconductor chip as claimed in claim 21, wherein

the height (h1) of the elevations is at least as large as the height (h2) of a non-patterned region of the multilayer structure between the active, radiation-generating layer and the elevations.

26. The semiconductor chip as claimed in claim 25, wherein

the height (h1) of the elevations is approximately twice as large as the height (h2) of the non-patterned region of the multilayer structure between the active, radiation-generating layer and the elevations.

27. The semiconductor chip as claimed in claim 21, wherein

a cell size (d) of the elevations is at most approximately five times as large as the height (h1) of the elevations.

28. The semiconductor chip as claimed in claim 27, wherein

the cell size (d) of the elevations is at most approximately three times as large as the height (h1) of the elevations.

29. The semiconductor chip as claimed in claim 19, wherein

the layer or interface coupled to the first main face of the multilayer structure has a reflectivity of at least 70%.

30. The semiconductor chip as claimed in claim 29, wherein

the layer or interface coupled to the first main face of the multilayer structure has a reflectivity of at least 85%.

31. The semiconductor chip as claimed in claim 19, wherein

the reflective layer is applied on a carrier substrate or the reflective interface is formed by a carrier substrate.

32. The semiconductor chip as claimed in claim 31, wherein

the reflective layer or the carrier substrate simultaneously serves as a contact layer of the semiconductor chip.

33. The semiconductor chip as claimed in claim 19, wherein

a transparent protective layer is applied on the second main face of the multilayer structure.

42. The semiconductor chip as claimed in claim 19, wherein

the multilayer structure contains a material or a plurality of different materials based on GaN.

34. A radiation-emitting thin-film semiconductor chip with an epitaxial multilayer structure, which contains an active, radiation-generating layer (14) and has a first main face and a second main face—

remote from the first main face—

for coupling out the radiation generated in the active, radiation-generating layer, wherein

the first main face of the multilayer structure is coupled to a reflective layer or interface, and a one- or two-dimensionally patterned coating layer is arranged on the second main face of the multilayer structure.

35. The semiconductor chip as claimed in claim 34, wherein

the coating layer has convex elevations.

36. The semiconductor chip as claimed in claim 34, wherein

the coating layer is transparent and conductive.

37. The semiconductor chip as claimed in claim 34, wherein

a metal layer is arranged between the coating layer and the multilayer structure.

38. The semiconductor chip as claimed in claim 37, wherein

the metal layer is formed such that it is very thin or not closed, in particular in reticulated or insular fashion.

39. The semiconductor chip as claimed in claim 34, wherein

the elevations have the form of pyramids, truncated pyramids, cones or truncated cones or a trapezoidal cross-sectional form or a triangular cross-sectional form or a circle-segment cross-sectional form.

40. The semiconductor chip as claimed in claim 34, wherein

the coating layer is formed in reticulated or insular fashion.

43. The semiconductor chip as claimed in claim 34, wherein

the multilayer structure contains a material or a plurality of different materials based on GaN.