Transmitter power amplifier working at different power supplies

• US 20080036532A1
• Filed: 08/11/2006
• Published: 02/14/2008
• Est. Priority Date: 08/11/2006
• Status: Active Grant

• Current Assignee: Avago Technologies International Sales Pte Limited (Broadcom, Inc.)
• Original Assignee: Broadcom Corporation (Broadcom, Inc.)
• Inventors: Pan, Meng-An (Michael)
• Granted Patent: US 7,459,969 B2
• Time in Patent Office: Days
• US Class Current: 330/51
• CPC Class Codes: H03F 1/02 Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
• CPC Class Codes: H03F 1/0205 in transistor amplifiers
• CPC Class Codes: H03F 1/0227 using supply converters
• CPC Class Codes: H03F 1/025 by using a signal derived from the input signal
• CPC Class Codes: H03F 1/0266 by using a signal derived from the input signal
• CPC Class Codes: H03F 1/0277 Selecting one or more amplifiers from a plurality of amplifiers
• CPC Class Codes: H03F 2200/321 Use of a microprocessor in an amplifier circuit or its control circuit
• CPC Class Codes: H03F 2200/336 A I/Q, i.e. phase quadrature, modulator or demodulator being used in an amplifying circuit
• CPC Class Codes: H03F 2200/451 the amplifier being a radio frequency amplifier
• CPC Class Codes: H03F 2200/504 the supply voltage or current being continuously controlled by a controlling signal, e.g. the controlling signal of a transistor implemented as variable resistor in a supply path for, an IC-block showed amplifier
• CPC Class Codes: H03F 2200/507 A switch being used for switching on or off a supply or supplying circuit in an IC-block amplifier circuit
• CPC Class Codes: H03F 2200/534 Transformer coupled at the input of an amplifier
• CPC Class Codes: H03F 2203/45056 One or both transistors of the cascode stage of a differential amplifier being composed of more than one transistor
• CPC Class Codes: H03F 2203/45292 the AAC comprising biasing means controlled by the signal
• CPC Class Codes: H03F 2203/45364 the AAC comprising multiple transistors parallel coupled at their gates and sources only, e.g. in a cascode dif amp, only those forming the composite common source transistor
• CPC Class Codes: H03F 3/24 of transmitter output stages
• CPC Class Codes: H03F 3/45188 Non-folded cascode stages
• CPC Class Codes: H03F 3/72 Gated amplifiers, i.e. amplifiers which are rendered operative or inoperative by means of a control signal
• CPC Class Codes: H04B 2001/0416 having gain or transmission power control
• CPC Class Codes: H04B 2001/045 with means for improving efficiency

Abstract

A method to reduce transmitted output power and the battery consumption is provided. This involves first determining the required output level. The amplitude of the input signal provided to a PA driver may be based on the required output power level. This amplitude may be set by a PGA. A number of cascode bias signals are also provided to the PA driver. These cascode bias signals are based on the required output power level as well. Reducing the cascode bias signals by enabling/disabling circuits within the PA driver allows power consumption of the wireless device to be reduced.

Claims

1. A method to reduce power consumption within a wireless device comprising:

supplying an input signal to a power amplifier (PA) driver;

supplying a plurality of cascode bias signals to the PA driver, wherein the cascode bias signals are operable to enable/disable differential transistor pairs within the PA driver;

producing an output signal based on the input signal used to generate an RF signal, wherein each enabled differential transistor pair contributes to the input signal, and wherein each disabled differential transistor pair results in reduced power consumption.

2. The method of claim 1, further comprising:

reducing a Vdd voltage supplied to the PA driver, wherein this voltage reduction results in results in reduced power consumption.

3. The method of claim 2, wherein a switching regulator is operable to reduce the Vdd voltage supplied to the PA driver.

4. The method of claim 1, wherein the input signal comprises an up converted signal differential analog signal.

5. The method of claim 1, wherein the RF signal is an 802.11 compliant signal.

6. The method of claim 1, further comprising:

determining a distance between a power output operating point and a first nonlinear compression point;

determining a second nonlinear compression point based on the power output operating point; and

setting Vdd based on the second nonlinear compression point.

7. The method of claim 1, further comprising determining a required output power level, wherein the required output power level is used to determine which differential transistor pairs are enabled/disabled.

8. The method of claim 1, wherein the amplitude of the input signal is provided by a programmable gain amplifier (PGA), wherein the PGA sets the amplitude based on a required output power level.

9. A method to reduce power consumption within a wireless device comprising:

determining a required transmitted output power level to be associated with the wireless device;

determining an amplitude of an up converted baseband signal based on the required transmitted output power level;

supplying the up converted baseband signal to a power amplifier (PA) driver;

supplying a plurality of cascode bias signals to the PA driver, wherein the cascode bias signals are operable to enable/disable differential transistor pairs within the PA driver, wherein the cascade bias signals are based on the required transmitted output power level; and

producing an output signal based on the up converted baseband signal, wherein the output signal is used to generate an RF signal, wherein each enabled differential transistor pair contributes to the input signal, and wherein each disabled differential transistor pair results in reduced power consumption.

10. The method of claim 9, further comprising:

reducing a Vdd voltage supplied to the PA driver based on the required transmitted output power level, wherein this voltage reduction results in results in reduced power consumption.

11. The method of claim 10, wherein a switching regulator is operable to reduce the Vdd voltage supplied to the PA driver.

12. The method of claim 10, wherein the RF signal is an 802.11 compliant signal.

13. The method of claim 10, further comprising:

determining a distance between a power output operating point and a first nonlinear compression point;

determining a second nonlinear compression point based on the power output operating point; and

setting Vdd based on the second nonlinear compression point.

14. A method to reduce power consumption within a wireless device comprising:

determining a required transmitted output power level to be associated with the wireless device;

determining an amplitude of an up converted baseband signal based on the required transmitted output power level;

supplying the up converted baseband signal to a power amplifier (PA) driver;

supplying a plurality of cascode bias signals to the PA driver, wherein the cascode bias signals are operable to enable/disable differential transistor pairs within the PA driver, wherein the cascade bias signals are based on the required transmitted output power level;

producing an output signal based on the up converted baseband signal, wherein the output signal is used to generate an RF signal, wherein each enabled differential transistor pair contributes to the input signal, and wherein each disabled differential transistor pair results in reduced power consumption; and

determining a distance between a power output operating point and a first nonlinear compression point;

determining a second nonlinear compression point based on the power output operating point;

setting Vdd based on the second nonlinear compression point; and

reducing a Vdd voltage supplied to the PA driver based on the required transmitted output power level, wherein this voltage reduction results in results in reduced power consumption.

15. The method of claim 14, wherein a switching regulator is operable to reduce the Vdd voltage supplied to the PA driver.

16. The method of claim 14, wherein the RF signal is an 802.11 compliant signal.

17. A wireless terminal that comprises:

a baseband processor operable to output a baseband digital signal;

an analog block operable to convert the baseband digital signal to a baseband analog signal and up convert the baseband analog signal;

a programmable gain amplifier (PGA) operable to receive the up converted baseband signal;

a power amplifier (PA) driver coupled to receive an output signal of the PGA, the PA driver comprising a plurality of differential transistor pairs, wherein individual transistor pairs are enabled/disabled based a required transmit output power level, and wherein an output of the PA driver is used to used to generate an RF signal.

18. The wireless terminal of claim 17, wherein the wireless terminal is operable to determine a required transmitted output power level, and wherein the amplitude of the up converted baseband signal is based on the required transmitted output power level.

19. The wireless terminal of claim 17, wherein a plurality of cascode bias signals are supplied to the PA driver, wherein the cascode bias signals are operable to enable/disable differential transistor pairs within the PA driver.

20. The wireless terminal of claim 17, wherein the wireless terminal is operable to:

determine a distance between a power output operating point and a first nonlinear compression point;

determine a second nonlinear compression point based on the power output operating point;

set a voltage (Vdd) supplied to the PA driver based on the second nonlinear compression point and the required transmitted output power level.