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DIAGNOSING MIXED SCAN CHAIN AND SYSTEM LOGIC DEFECTS

  • US 20080040637A1
  • Filed: 08/14/2007
  • Published: 02/14/2008
  • Est. Priority Date: 08/14/2006
  • Status: Active Grant
First Claim
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1. A method, comprising:

  • receiving a failure log indicative of failing test bits observed during testing of an electronic circuit, the electronic circuit having at least one defect in system logic and at least one defect in a scan chain;

    identifying one or more fault suspects in the system logic of the electronic circuit;

    identifying one or more fault suspects in the at least one scan chain of the electronic circuit; and

    storing a description of the identified one or more fault suspects in the system logic and of the identified one or more fault suspects in the at least one scan chain in one or more computer-readable media.

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