Semiconductor chip structure
First Claim
1. A semiconductor chip structure comprising:
- a semiconductor substrate;
a metallization structure over said semiconductor substrate, wherein said metallization structure comprise a copper pad;
a passivation layer over said semiconductor substrate and over said metallization structure, wherein an opening in said passivation layer exposes said copper pad;
a first adhesion/barrier layer on said copper pad;
a first metal layer on said first adhesion/barrier layer, wherein said first metal layer comprises aluminum;
a second adhesion/barrier layer over said first metal layer and over said passivation layer; and
a second metal layer over said second adhesion/barrier layer.
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Accused Products
Abstract
A semiconductor chip structure includes a semiconductor substrate, an circuit structure, a passivation layer, a first adhesion/barrier layer, a metal cap and a metal layer. The semiconductor substrate has multiple electric devices located on a surface layer of a surface of the substrate. The circuit structure had multiple circuit layers electrically connecting with each other and electrically connecting with the electric devices. One of the circuit layers has multiple pads. The passivation layer is located on the circuit structure and has multiple openings penetrating through the passivation layer. The openings expose the pads. The first adhesion/barrier layer is over the pads and the passivation layer. The metal cap is located on the first adhesion/barrier layer and the passivation layer. The metal layer is on the metal layer.
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Citations
20 Claims
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1. A semiconductor chip structure comprising:
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a semiconductor substrate;
a metallization structure over said semiconductor substrate, wherein said metallization structure comprise a copper pad;
a passivation layer over said semiconductor substrate and over said metallization structure, wherein an opening in said passivation layer exposes said copper pad;
a first adhesion/barrier layer on said copper pad;
a first metal layer on said first adhesion/barrier layer, wherein said first metal layer comprises aluminum;
a second adhesion/barrier layer over said first metal layer and over said passivation layer; and
a second metal layer over said second adhesion/barrier layer. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11)
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12. A semiconductor chip or wafer comprising:
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a semiconductor substrate;
a metallization structure over said semiconductor substrate, wherein said metallization structure comprise a copper pad;
a first passivation layer over said semiconductor substrate and over said metallization structure, wherein an first opening in said first passivation layer exposes said copper pad;
a first adhesion/barrier layer on said copper pad;
a first metal layer on said first adhesion/barrier layer, wherein said first metal layer comprises aluminum;
a second passivation layer on said first metal layer and on said first passivation layer, wherein an second opening in said second passivation layer exposes said first metal layer;
a second adhesion/barrier layer over said first metal layer and over said second passivation layer; and
a second metal layer over said second adhesion/barrier layer. - View Dependent Claims (13, 14, 15, 16, 17, 18, 19, 20)
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Specification