Display device and electronic equipment

• US 20080042948A1
• Filed: 08/07/2007
• Published: 02/21/2008
• Est. Priority Date: 08/17/2006
• Status: Active Grant

• Current Assignee: JDI Design and Development GK
• Original Assignee: Sony Corporation (Sony Group Corp.)
• Inventors: Uchino, Katsuhide, Yamashita, Junichi
• Granted Patent: US 7,646,363 B2
• Time in Patent Office: Days
• US Class Current: 345/82
• CPC Class Codes: G09G 2300/0426 Layout of electrodes and connections
• CPC Class Codes: G09G 2300/0439 Pixel structures
• CPC Class Codes: G09G 2300/0819 used for counteracting undesired variations, e.g. feedback or autozeroing
• CPC Class Codes: G09G 2300/0861 with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes
• CPC Class Codes: G09G 2300/0866 by means of changes in the pixel supply voltage
• CPC Class Codes: G09G 2310/0262 The addressing of the pixel, in a display other than an active matrix LCD, involving the control of two or more scan electrodes or two or more data electrodes, e.g. pixel voltage dependent on signals of two data electrodes
• CPC Class Codes: G09G 2310/0289 Details of voltage level shifters arranged for use in a driving circuit
• CPC Class Codes: G09G 2320/0223 Compensation for problems related to R-C delay and attenuation in electrodes of matrix panels, e.g. in gate electrodes or on-substrate video signal electrodes
• CPC Class Codes: G09G 2320/043 Preventing or counteracting the effects of ageing
• CPC Class Codes: G09G 3/3233 with pixel circuitry controlling the current through the light-emitting element
• CPC Class Codes: G09G 3/3266 Details of drivers for scan electrodes

Abstract

A display device is disclosed. The display device includes: a pixel array part; and a drive part that drives the pixel array part. The pixel array part includes row-wise first scan lines and second scan lines, column-wise signal lines, pixels arranged in a matrix form on parts where the lines intersect, and power supply lines and ground lines that supply power to the respective pixels. The drive part includes a first scanner that sequentially supplies first control signals to the respective first scan lines and line-sequentially scans the pixels in units of rows, a second scanner that sequentially supplies second control signals to the respective second scan lines according to the line-sequential scan, and a signal selector that supplies video signals to the column-wise signal lines according to the line-sequential scan.

Claims

1. A display device comprising:

a pixel array part; and

a drive part that drives the pixel array part,

the pixel array part including row-wise first scan lines and second scan lines, column-wise signal lines, pixels arranged in a matrix form on parts where the lines intersect, and power supply lines and ground lines that supply power to the respective pixels,

the drive part including a first scanner that sequentially supplies first control signals to the respective first scan lines and line-sequentially scans the pixels in units of rows, a second scanner that sequentially supplies second control signals to the respective second scan lines according to the line-sequential scan, and a signal selector that supplies video signals to the column-wise signal lines according to the line-sequential scan,

the pixel including a light emitting device, a sampling transistor, a drive transistor, a switching transistor, and a pixel capacity,

the sampling transistor having a gate connecting to the first scan line, a source connecting to the signal line, and a drain connecting to a gate of the drive transistor,

the drive transistor and the light emitting device series-connected between the power supply line and the ground line to form a current path,

the switching transistor inserted into the current path and having a gate connecting to the second scan line,

the pixel capacity connecting between a source and the gate of the drive transistor,

wherein the sampling transistor turns on in response to the first control signal supplied from the first scan line, and samples a signal potential of the video signal supplied from the signal line and holds the potential in the pixel capacity,

the switching transistor turns on in response to the second control signal supplied from the second scan line to make the current path into a conducting state,

the drive transistor passes drive current to the light emitting device in response to the signal potential held in the pixel capacity through the current path in the conducting state,

the drive part performs correction of mobility of the drive transistor on the signal potential held in the pixel capacity in a correction time from first timing when the second control signal is applied to the second scan line and the switching transistor turns on to second timing when the first scan signal applied to the first scan line is cancelled and the sampling transistor turns off, after applying the first control signal to the first scan line and turning on the sampling transistor to start sampling of the signal potential,

at least one of the first scanner and the second scanner has output buffers for outputting the first or second control signals,

the output buffer has one switching element that principally forms a rising waveform of the control signal, and another switching element that principally forms a falling waveform of the control signal,

the respective switching elements are configured by transistors, respectively,

in the control signal, one of the rising waveform and the falling waveform is a determining waveform that determines the first timing or the second timing in the correction time, the other of the rising waveform and the falling waveform is a non-determining waveform that is unrelated to the first timing and the second timing in the correction time, and

in the output buffer, a transistor size of a superior switching element at the side of forming the determining waveform is set larger than a transistor size of an inferior switching element at the side of forming the non-determining waveform.

2. The display device according to claim 1, wherein the output buffer is an inverter including a PMOS transistor and an NMOS transistor, and, when the falling waveform of the control signal is the determining waveform, the NMOS transistor that principally forms the waveform is the superior switching element, when the rising waveform of the control signal is the determining waveform, the PMOS transistor that principally forms the waveform is the superior switching element, and the transistor size of the superior switching element is set larger than the transistor size of the inferior switching element.

3. The display device according to claim 2, wherein both determining waveforms of the first timing and the second timing are falling waveforms, and the NMOS transistors are larger than the PMOS transistors in size in both output buffers of the first scanner and the second scanner.

4. The display device according to claim 1, wherein, in the output buffer, the superior switching element includes a CMOS transistor, the inferior switching element includes an NMOS transistor or PMOS transistor, and a size of the CMOS transistor is larger than a size of the NMOS transistor or PMOS transistor.

5. The display device according to claim 1, wherein the output buffer draws a waveform of a pulse externally supplied and outputs the waveform as a determining waveform of the control signal when the superior switching element turns on and the inferior switching element turns off.

6. Electronic equipment comprising the display device according to claim 1.

7. A display device comprising:

a pixel array part; and

a drive part that drives the pixel array part,

the pixel array part including row-wise scan lines, column-wise signal lines, pixels arranged in a matrix form on parts where the lines intersect, and power supply lines and ground lines that supply power to the respective pixels,

the drive part including a scanner that sequentially supplies control signals to the respective scan lines and line-sequentially scans the pixels,

the pixel including a light emitting device, a sampling transistor, a drive transistor, a switching transistor, and a pixel capacity,

the sampling transistor having a gate connecting to the scan line, a source connecting to the signal line, and a drain connecting to a gate of the drive transistor,

the drive transistor and the light emitting device series-connected between the power supply line and the ground line to form a current path,

the switching transistor inserted into the current path and having a gate connecting to the scan line, and

the pixel capacity connecting between a source and the gate of the drive transistor,

wherein at least one of the scanner has output buffers for outputting the control signals, and

in the output buffer, a transistor size of a superior switching element at a side of forming a determining waveform is set larger than a transistor size of an inferior switching element at a side of forming a non-determining waveform.