Systems and methods for wireless communication over a wide bandwidth channel using a plurality of sub-channels

• US 20080043653A1
• Filed: 10/18/2007
• Published: 02/21/2008
• Est. Priority Date: 12/06/2001
• Status: Abandoned Application

• Current Assignee: Intellectual Ventures Holding 73 LLC (Intellectual Ventures LLC)
• Original Assignee: Intellectual Ventures Holding 73 LLC (Intellectual Ventures LLC)
• Inventors: Lakkis, Ismail
• Application Number:
  US11/975,607
• Publication Number:
  US 20080043653A1
• Time in Patent Office: Days
• US Class Current: 370/310
• CPC Class Codes: H04B 1/71632 Signal aspects H04B1/7172 and H04B1/7176 take precedence
• CPC Class Codes: H04B 1/71635 Transmitter aspects H04B1/7174 takes precedence

Abstract

A method of communicating over a wideband communication channel divided into a plurality of sub-channels comprises dividing a single serial message intended for one of the plurality of communication devices into a plurality of parallel messages, encoding each of the plurality of parallel messages onto at least some of the plurality of sub-channels, and transmitting the encoded plurality of parallel messages to the communication device over the wideband communication channel. This Abstract is provided for the sole purpose of complying with the Abstract requirement rules that allow a reader to quickly ascertain the subject matter of the disclosure contained herein. This Abstract is submitted with the explicit understanding that it will not be used to interpret or to limit the scope or the meaning of the claims.

Claims

1. A transmitter, comprising:

a serial-to-parallel transformer configured to transform a single serial bit stream comprising messages for a plurality of communication device into a plurality of bit streams;

a modulator configured to perform time division modulation or frequency division modulation on each of the plurality of bit streams; and

a summer configured to sum the plurality of bit streams into a single transmit signal.

2. The transmitter of claim 1, further comprising:

a scrambler configured to scramble each of the plurality of bit streams;

an encoder configured to encode each of the plurality of bit streams; and

an interleaver configured to interleave each of the plurality of bit streams.

3. The transmitter of claim 2, further comprising a symbol mapper configured to perform symbol mapping on each of the plurality of bit streams.

4. The transmitter of claim 3, wherein the type of symbol mapping used on each of the plurality of bit streams is programmable based on signal to interference measurements provided by each of the plurality of communication devices.

5. The transmitter of claim 1, wherein the modulator is further configured to filter each of the plurality of bit streams to provide a required pulse shaping for each of the plurality of bit streams.

6. The transmitter of claim 1, further comprising a RF transmitter configured to transmit the single transmit signal over a communication channel comprising sub-channels corresponding to each of the plurality of bit streams.

7. A transmitter, comprising:

a serial-to-parallel transformer configured to transform a single serial bit stream with an overall data rate into a plurality of bit streams;

a modulator configured to perform time division modulation or frequency division modulation on each of the plurality of bit streams;

a rate controller configured to adjust the overall data rate; and

a summer configured to sum the plurality of bit streams into a single transmit signal.

8. The transmitter of claim 7, wherein the rate controller is configured to adjust the overall data rate by spreading the plurality of bit streams in the frequency domain.

9. The transmitter of claim 7, wherein the rate controller is configured to adjust the overall data rate down by encoding n data streams onto m channels, where m>

n.

10. The transmitter of claim 9, wherein the rate controller is further configured to scramble the duplicate bit streams.

11. The transmitter of claim 7, wherein the rate controller is configured to adjust the overall data rate by:

splitting each of the plurality of bit streams into a first bit stream and a second bit stream, and

delaying each second bit stream by half a symbol period relative to each first bit stream;

and wherein the modulator is further configured to;

filter each first and second bit stream, and

sum each filtered first bit stream and each filtered second bit stream together.

12. The transmitter of claim 7, wherein the rate controller is configured so that it can be programmed to increase the overall data rate or decrease the overall data rate.

13. A transmitter, comprising:

a serial-to-parallel transformer configured to transform a single serial bit stream into a plurality of bit streams;

a modulator configured to perform time division modulation or frequency division modulation on each of the plurality of bit streams;

a frequency encoder configured to encode information from more than one of the plurality of bit streams onto each of a plurality of frequencies corresponding to a plurality of sub-channels; and

a summer configured to sum the plurality of bit streams into a single transmit signal.

14. The transmitter of claim 13, further comprising a frequency encoder that is configured so that a type of frequency encoding performed is programmable.

15. A transmitter, comprising:

a serial-to-parallel transformer configured to transform a single serial bit stream with an overall data rate into a plurality of bit streams;

a modulator configured to perform time division modulation or frequency division modulation on each of the plurality of bit streams;

a rate controller configured to adjust the overall data rate, and

a frequency encoder configured to encode information from more than one of the plurality of bit streams onto each of a plurality of frequencies corresponding to a plurality of sub-channels; and

a summer configured to sum the plurality of bit streams into a single transmit signal.

16. The transmitter of claim 15, wherein the rate controller and frequency encoder are configured to be turned on and of as required.

17. The transmitter of claim 15, wherein the rate controller is configured so that it can be programmed to increase the overall data rate or decrease the overall data rate.

18. The transmitter of claim 15, wherein the frequency encoder is configured so that the type of frequency encoding performed is programmable.

19. A receiver, comprising:

a RF receiver configured to receive a transmit signal comprising a plurality of bit streams, each bit stream comprising a frequency offset;

a frequency shifter configured to shift the frequency of each of the plurality of bit streams so as to remove the corresponding frequency offset;

a filter configured to filter each of plurality of bit streams so as to apply a correct pulse shaping to each of the plurality of bit streams;

an equalizer configured to perform equalization on each of the plurality of bit streams; and

a parallel-to-serial transformer configured transform the plurality of bit streams into a single serial bit stream.

20. The receiver of claim 19, wherein the received transmit signal comprises an overall bandwidth divided into a plurality of sub-channels, and wherein the frequency offsets of each of the plurality of bit streams correspond to a particular sub-channel.

21. The receiver of claim 20, wherein the frequency shifter is programmed to only shift the frequency for those of the plurality of bit streams that correspond to sub-channels that have been assigned to a communication device comprising the receiver.

22. The receiver of claim 19, further comprising:

a descrambler for descrambling each of the plurality of bit streams;

a decoder for decoding each of the plurality of bit streams;

and a deinterleaver for deinterleaving each of the plurality of bit streams.

23. The receiver of claim 19, wherein the equalizer is a time domain equalizer or a frequency domain equalizer.

24. The receiver of claim 19, wherein the received transmit signal comprises an overall bandwidth that is divided into a plurality of sub-channels, and wherein the receiver further comprises an estimator configured to estimate a signal to noise and interference ratio for each subchannel.

25. The receiver of claim 19, wherein the received transmit signal comprises an overall bandwidth that is divided into a plurality of sub-channels, and wherein the receiver further comprises an estimator configured to estimate the channel impulse response for each sub-channel.