APPARATUS AND METHOD FOR IN-LINE INSERTION AND REMOVAL OF MARKERS

• US 20080043750A1
• Filed: 01/19/2007
• Published: 02/21/2008
• Est. Priority Date: 01/19/2006
• Status: Active Grant

• Current Assignee: Intel Corporation
• Original Assignee: NetEffect, Inc. (Intel Corporation)
• Inventors: Keels, Kenneth, Maguire, David, Hausauer, Brian, Carlson, Jeff
• Granted Patent: US 7,889,762 B2
• Time in Patent Office: Days
• US Class Current: 370/395.52
• CPC Class Codes: H04L 49/90 Buffering arrangements
• CPC Class Codes: H04L 49/9094 Arrangements for simultaneous transmit and receive, e.g. simultaneous reading/writing from/to the storage element
• CPC Class Codes: H04L 67/02 based on web technology, e.g. hypertext transfer protocol [HTTP]
• CPC Class Codes: H04L 69/12 Protocol engines

Abstract

An apparatus is provided, for performing a direct memory access (DMA) operation between a host memory in a first server and a network adapter. The apparatus includes a host frame parser and a protocol engine. The host frame parser is configured to receive data corresponding to the DMA operation from a host interface, and is configured to insert markers on-the-fly into the data at a prescribed interval and to provide marked data for transmission to a second server over a network fabric. The protocol engine is coupled to the host frame parser. The protocol engine is configured to direct the host frame parser to insert the markers, and is configured to specify a first marker value and an offset value, whereby the host frame parser is enabled to locate and insert a first marker into the data.

Claims

1. An apparatus, for performing a direct memory access (DMA) operation between a host memory in a first server and a network adapter, the apparatus comprising:

a host frame parser, configured to receive data corresponding to the DMA operation from a host interface, and configured to insert marker on-the-fly into said data at a prescribed interval, and configured to provide marked data for transmission to a second server over a network fabric;

a protocol engine, coupled to said host frame parser, configured to direct said host frame parser to insert said markers, and configured to specify a first marker value and an offset value, whereby said host frame parser is enabled to locate and insert a first marker into said frame data.

2. The apparatus as recited in claim 1, wherein said markers comprise 4-byte MPA markers according to Marker PDU aligned protocol, and wherein said first marker value indicates a corresponding MPA header in a TCP byte stream, and wherein said offset value specifies a number of bytes from a beginning of said data for placement of said first marker.

3. The apparatus as recited in claim 1, wherein said host interface comprises a PCI interface.

4. The apparatus as recited in claim 3, wherein said PCI interface comprises a PCI Express interface.

5. The apparatus as recited in claim 1, wherein said network fabric is configured to convey RDMA-over-Ethernet transactions.

6. The apparatus as recited in claim 1, wherein said network fabric is configured to convey iSCSI-over-Ethernet transactions.

7. The apparatus as recited in claim 1, wherein said network comprises one or more 10-Gb Ethernet links.

8. The apparatus as recited in claim 1, wherein said data comprises data corresponding to one or more frame protocol data units (FPDUs).

9. The apparatus as recited in claim 1, wherein said host frame parser is disposed within said host interface.

10. The apparatus as recited in claim 1, wherein said protocol engine comprises:

marker logic, configured to specify said first marker value and said offset value.

11. The apparatus as recited in claim 1, wherein said host frame parser comprises:

marker insertion logic, configured to insert said first marker into said data, and further configured to insert subsequent markers, if required, into said data according to said prescribed interval.

12. The apparatus as recited in claim 11, wherein said prescribed interval comprises 512 bytes from a start location of a preceding marker, and wherein values of said subsequent markers are increased by 512 bytes.

13. The apparatus as recited in claim 2, wherein said protocol engine is configured to insert said first marker into said data if said first marker falls within an MPA, DDP, or RDMAP header space.

14. The apparatus as recited in claim 1, wherein said host frame parser and said protocol engine are disposed within the network adapter, and wherein the network adapter corresponds to the first server.

15. The apparatus as recited in claim 1, wherein said host frame parser inserts said markers into said data as said data is transferred from said host interface, thereby precluding buffering of all data corresponding to the DMA operation prior to insertion of said markers.

16. An apparatus, for performing a direct memory access (DMA) operation between host memory in a first server and a network adapter, the apparatus comprising:

a host frame parser, configured to receive marked data received from a second server over a network fabric, and configured to remove markers on-the-fly from said marked data at a prescribed interval, and configured to provide data corresponding to the DMA operation to a host interface; and

a protocol engine, coupled to said host frame parser, configured to direct said host frame parser to remove said markers, and configured to specify an offset value, whereby said host frame parser is enabled to locate and remove a first marker from said marked data.

17. The apparatus as recited in claim 16, wherein said markers comprise 4-byte MPA markers according to Marker PDU aligned protocol, and wherein said first marker indicates a corresponding MPA header in a TCP byte stream, and wherein said offset value specifies a number of bytes from a beginning of said marked data to said first marker.

18. The apparatus as recited in claim 16, wherein said host interface comprises a PCI interface.

19. The apparatus as recited in claim 18, wherein said PCI interface comprises a PCI Express interface.

20. The apparatus as recited in claim 16, wherein said network fabric is configured to convey RDMA-over-Ethernet transactions.

21. The apparatus as recited in claim 16, wherein said network fabric is configured to convey iSCSI-over-Ethernet transactions.

22. The apparatus as recited in claim 16, wherein said network fabric comprises one or more 10-Gb Ethernet links.

23. The apparatus as recited in claim 16, wherein said data comprises data corresponding to one or more framed protocol data units (FPDUs).

24. The apparatus as recited in claim 16, wherein said host frame parser is disposed within said host interface.

25. The apparatus as recited in claim 16, wherein said protocol engine comprises:

marker logic, configured to specify said offset value.

26. The apparatus as recited in claim 16, wherein said host frame parser comprises:

marker removal logic, configured to remove said first marker from said marked data, and further configured to remove subsequent markers, if required, from said marked data according to said prescribed interval.

27. The apparatus as recited in claim 26, wherein said prescribed interval comprises 512 bytes from a start location of a preceding marker.

28. The apparatus as recited in claim 17, wherein said protocol engine is configured to remove said first marker from said marked data if said first marker falls within an MPA, DDP, or RDMAP header space. I have a question for Ken to answer in the morning on this one, but if time gets short just file as-is.

29. The apparatus as recited in claim 16, wherein said host frame parser and said protocol engine are disposed within the network adapter, and wherein the network adapter corresponds to the first server.

30. The apparatus as recited in claim 16, wherein said host frame parser removes said markers from said marked data as said data is being transferred to said host interface, thereby precluding buffering of all data corresponding to the DMA operation following removal of said markers.

31. A method for performing a direct memory access (DMA) operation between a host memory in a first server and a network adapter, the method comprising:

within a host frame parser, receiving data corresponding to the DMA operation from a host interface, and inserting markers on-the-fly into the data at a prescribed interval, and providing marked data or transmission to a second server over a network fabric; and

directing the host frame parser to insert the markers by specifying a first marker value and an offset value.

32. The method as recited in claim 31, wherein the markers comprise 4-byte MPA markers according to Marker PDU aligned protocol, and wherein the first marker value indicates a corresponding MPA header in a TCP byte stream, and wherein the offset value specifies a number of bytes from a beginning of the data for placement of a first marker.

33. The method as recited in claim 31, wherein the host interface comprises a PCI interface and wherein the network fabric comprises an RDMA-over-Ethernet fabric.

34. The method as recited in claim 31, wherein the host interface comprises a PCI interface and wherein the network fabric comprises an iSCSI-over-Ethernet fabric.

35. The method as recited in claim 31, wherein said inserting comprises placing the markers into one or more framed protocol data units (FPDUs).

36. The method as recited in claim 31, wherein said inserting comprises:

first placing a first marker into the data; and

second placing subsequent markers, if required, into the data following the first marker according to the prescribed interval.

37. The method as recited in claim 32, further comprising:

if the first marker falls within an MPA, DDP, or RDMAP header space, placing the first marker into the data via a protocol engine.

38. The method as recited in claim 31, wherein said inserting comprises:

precluding buffering of all data corresponding to the DMA operation prior to insertion of the markers.

39. A method for performing a direct memory access (DMA) operation between a host memory in a first server and a network adapter, the method comprising:

within a host frame parser, receiving marked data received from a second server over a network fabric, and removing markers on-the-fly from the marked data at a prescribed interval, and providing data corresponding to the DMA operation to a host interface; and

directing the host frame parser to remove the markers by specifying an offset value.

40. The method as recited in claim 39, wherein the markers comprise 4-byte MPA markers according to Marker PDU aligned protocol, and wherein the offset value specifies a number of bytes from a beginning of the marked data for removal of a first marker, and wherein the first marker value indicates a corresponding MPA header in a TCP byte stream.

41. The method as recited in claim 39, wherein the host interface comprises a PCI interface and wherein the network fabric comprises an RDMA-over-Ethernet fabric.

42. The method as recited in claim 39, wherein the host interface comprises a PCI interface and wherein the network fabric comprises an iSCSI-over-Ethernet fabric.

43. The method as recited in claim 39, wherein said removing comprises deleting the markers from one or more frame protocol data units (FPDUs).

44. The method as recited in claim 39, wherein said removing comprises:

first deleting a first marker from the marked data; and

second deleting subsequent markers, if required, from the marked data following the first marker according to the prescribed interval.

45. The method as recited in claim 40, further comprising:

if the first marker falls within an MPA, DDP, or RDMAP header space, deleting the first marker from the marked data via a protocol engine.

46. The method as recited in claim 39, wherein said removing comprises:

precluding buffering of all data corresponding to the DMA operation following removal of the markers.