METHOD FOR FORMING AN ARRAY SUBSTRATE

• US 20080044953A1
• Filed: 05/07/2007
• Published: 02/21/2008
• Est. Priority Date: 07/03/2006
• Status: Active Grant

• Current Assignee: AU Optronics Corporation
• Original Assignee: AU Optronics Corporation
• Inventors: Shih, Chih-Hung, Yang, Chih-Chun, Huang, Ming-Yuan
• Granted Patent: US 7,547,590 B2
• Time in Patent Office: Days
• US Class Current: 438/129
• CPC Class Codes: H01L 27/1255 integrated with passive devices, e.g. auxiliary capacitors
• CPC Class Codes: H01L 27/1288 employing particular masking sequences or specially adapted masks, e.g. half-tone mask
• CPC Class Codes: Y10S 438/951 Lift-off

Abstract

Disclosed is a method for manufacturing an array substrate utilizing a laser ablation process. With the laser ablation process, a photoresist layer is removed along with the transparent conductive layer therefrom, while maintaining other portions of the transparent conductive layer. Moreover, the laser ablation process of the invention does not need additional photo-mask, so the fabrication cost can be reduced.

Claims

1. A method for manufacturing an array substrate, comprising:

providing a substrate;

forming a contact pad, a thin film transistor (TFT), a pixel region, and a storage capacitor on the substrate;

forming a passivation layer on the contact pad, the TFT, the pixel region, and the storage capacitor;

forming a patterned photoresist layer on the passivation layer;

removing part of the passivation layer uncovered by the patterned photoresist layer to expose the pixel region, part of the TFT, part of the storage capacitor, and part of the contact pad;

forming a transparent conductive layer on the patterned photoresist layer, on the exposed pixel region, on the exposed part of the TFT, on the exposed part of the storage capacitor, and on the exposed part of the contact pad; and

applying a laser ablation process to remove the patterned photoresist layer and the transparent conductive layer on the patterned photoresist layer, so that the transparent conductive layer remains on the pixel region, on the part of the TFT, on the part of the storage capacitor, and on the part of the contact pad.

2. The method of claim 1, wherein the transparent conductive layer comprises transparent metal oxide.

3. The method of claim 2, wherein the transparent metal oxide comprises indium tin oxide, indium zinc oxide, cadmium tin oxide, aluminum zinc oxide, or combinations thereof.

4. The method of claim 1, wherein the laser ablation process has an energy of about 650 mJ to about 1800 mJ.

5. The method of claim 1, wherein the laser ablation process has a wavelength substantially greater than or substantially equal to 900 nm.

6. The method of claim 1, wherein the passivation layer comprises organic material, inorganic material, or combinations thereof.

7. The method of claim 1, wherein the passivation layer comprises silicon nitride, silicon oxide, silicon oxynitride, silicon carbide, silicon oxycarbide, or combinations thereof.

8. The method of claim 1, wherein the passivation layer comprises organic silicon compound or organic polymer.

9. The method of claim 6, wherein the organic material has a bond dissociation energy substantially greater than or substantially equal to an energy of the laser ablation process.

10. The method of claim 1, wherein the formation of the contact pad, the TFT, the pixel region, and the storage capacitor on the substrate comprises:

forming a first patterned metal layer on the substrate to form a gate electrode of the TFT, a bottom electrode of the storage capacitor, the contact pad, and to expose the substrate in the pixel region;

forming a dielectric layer on the exposed part of the substrate in the pixel region, on the contact pad, on the gate electrode of the TFT, and on the bottom electrode;

forming a channel layer and an ohmic contact layer on the gate electrode of the TFT;

forming a second patterned metal layer on the substrate to form source/drain electrodes of the TFT and a top electrode of the storage capacitor;

removing the part of the ohmic contact layer un-covered by the source/drain electrodes to expose part of the channel layer.

11. The method of claim 10, further comprising forming an etch stop layer between the channel layer and the ohmic contact layer.

12. The method of claim 1, wherein the formation of the contact pad, the TFT, the pixel region, and the storage capacitor on the substrate comprises:

forming a first patterned metal layer on the substrate to form a gate electrode of the TFT, a bottom electrode of the storage capacitor, contact pad, and to expose the substrate in the pixel region;

forming a dielectric layer, a channel layer, an ohmic contact layer, a second metal layer, and a photoresist layer on the contact pad, on the gate electrode, on the bottom electrode, and on the substrate in the pixel region;

patterning the photoresist layer to form a thin photoresist region and a thick photoresist region, so that the thin photoresist region substantially aligns with the gate electrode, and the thick photoresist region substantially aligns with the bottom electrode and two sides of the gate electrode;

removing the part of the second metal layer un-covered by the thin photoresist region and the thick photoresist region;

removing the thin photoresist region;

removing the part of the second metal layer and the part of the ohmic contact layer on the gate electrode to expose part of the channel layer, and

removing the part of the ohmic contact layer and the part of the channel layer un-covered by the thick photoresist layer, so that the un-removed part of the second metal layer acts as source/drain electrodes of the TFT and a top electrode of the storage capacitor; and

removing the thick photoresist region.

13. The method of claim 12, further comprising forming an etch stop layer between the channel layer and the ohmic contact layer.

14. The method of claim 1, wherein the formation of the contact pad, the TFT,

the pixel region, and the storage capacitor on the substrate respectively comprises:

forming a first patterned metal layer on the substrate to form a gate electrode of the TFT, a bottom electrode of the storage capacitor, contact pad, and to expose the substrate of the pixel region;

forming a dielectric layer, a channel layer, an ohmic contact layer, a second metal layer, and a photoresist layer on the contact pad, on the gate electrode, on the bottom electrode, and on the substrate of the pixel region;

patterning the photoresist layer to form a thin photoresist region and a thick photoresist region, so that the thin photoresist region substantially aligns with the gate electrode, and the thick photoresist region substantially aligns with the bottom electrode and two sides of the gate electrode;

removing part of the second metal layer, part of the ohmic contact layer, and part of the channel layer un-covered by the thin photoresist region and the thick photoresist region to expose part of the dielectric layer;

removing the thin photoresist region;

removing the part of the second metal layer and the part of the ohmic contact layer on the gate electrode to expose the part of the channel layer, so that the un-removed part of the second metal layer acts as source/drain electrodes of the TFT and a top electrode of the storage capacitor; and

removing the thick photoresist region.

15. The method of claim 14, further comprising forming an etch stop layer between the channel layer and the ohmic contact layer.

16. A method for making an electro-optical apparatus incorporating the method of claim 1.