Methods and Apparatus For Accelerating Data Parsing
First Claim
Patent Images
1. An integrated circuit for parsing Extensible Markup Language (XML) data, the integrated circuit comprising:
- memory;
parsing circuitry configured to parse an element tag provided to the integrated circuit, wherein the parsing circuitry scans for characters associated with the element tag, wherein each of the characters is simultaneously input into a first component and a second component of the parsing circuitry with a single access to the character, wherein the first component calculates a hash value for the input character, and the second component copies the input character to a first preallocated block of memory, wherein the first and second components simultaneously perform the hash value calculation and the copying while the scan of the characters occurs; and
an interface for allowing communication between the parsing circuitry and the memory.
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Abstract
According to the present invention, methods and apparatus are provided for improving the efficiency of data parsing. Data parsing can be applied to a variety of different types of data in various computer systems and appliances. Some of the methods and apparatus provided include techniques for scanning, verifying, calculating hash values, copying, and white space handling.
19 Citations
7 Claims
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1. An integrated circuit for parsing Extensible Markup Language (XML) data, the integrated circuit comprising:
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memory;
parsing circuitry configured to parse an element tag provided to the integrated circuit, wherein the parsing circuitry scans for characters associated with the element tag, wherein each of the characters is simultaneously input into a first component and a second component of the parsing circuitry with a single access to the character, wherein the first component calculates a hash value for the input character, and the second component copies the input character to a first preallocated block of memory, wherein the first and second components simultaneously perform the hash value calculation and the copying while the scan of the characters occurs; and
an interface for allowing communication between the parsing circuitry and the memory. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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Specification