Semiconductor Device and Method of Manufacturing the Same
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Abstract
The present invention relates to a semiconductor device including a circuit composed of thin film transistors having a novel GOLD (Gate-Overlapped LDD (Lightly Doped Drain)) structure. The thin film transistor comprises a first gate electrode and a second electrode being in contact with the first gate electrode and a gate insulating film. Further, the LDD is formed by using the first gate electrode as a mask, and source and drain regions are formed by using the second gate electrode as the mask. Then, the LDD overlapping with the second gate electrode is formed. This structure provides the thin film transistor with high reliability.
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Citations
16 Claims
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1. (canceled)
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2. A ferroelectric liquid crystal display device comprising:
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a CMOS circuit comprising;
an n-channel TFT comprising;
a first semiconductor layer comprising a first channel formation region, a pair of first LDD regions, and first source and drain regions;
a first gate insulating film provided over the first semiconductor layer; and
a first gate electrode provided over the first gate insulating film, and partially overlapping the pair of first LDD regions, a p-channel TFT comprising;
a second semiconductor layer comprising a first channel formation region, a pair of second LDD regions, and second source and drain regions;
a second gate insulating film provided over the second semiconductor layer; and
a second gate electrode provided over the second gate insulating film, and partially overlapping the pair of second LDD regions, an insulating film comprising silicon nitride over the n-channel TFT and the p-channel TFT, wherein each of the first and second gate electrode comprises a first conductive layer, a second conductive layer provided over the first conductive layer, and a third conductive layer provided over the second conductive layer, wherein the first and second conductive layers, each comprising a material selected from the group consisting of titanium, tantalum, tungsten and molybdenum, and wherein a third conductive layer provided between comprising a material selected from the group consisting of aluminum and copper. - View Dependent Claims (5, 8, 11, 14)
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3. A ferroelectric liquid crystal display device comprising:
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a CMOS circuit comprising;
an n-channel TFT comprising;
a first semiconductor layer comprising a first channel formation region, a pair of first LDD regions, and first source and drain regions;
a first gate insulating film provided over the first semiconductor layer; and
a first gate electrode provided over the first gate insulating film, and overlapping the pair of first LDD regions, a p-channel TFT comprising;
a second semiconductor layer comprising a first channel formation region, a pair of second LDD regions, and second source and drain regions;
a second gate insulating film provided over the second semiconductor layer; and
a second gate electrode provided over the second gate insulating film, and overlapping the pair of second LDD regions, an insulating film comprising silicon nitride over the n-channel TFT and the p-channel TFT, wherein each of the first and second gate electrode comprises a first conductive layer, a second conductive layer provided over the first conductive layer, and a third conductive layer provided over the second conductive layer, wherein the first and second conductive layers, each comprising a material selected from the group consisting of titanium, tantalum, tungsten and molybdenum, and wherein a third conductive layer provided between comprising a material selected from the group consisting of aluminum and copper. - View Dependent Claims (6, 9, 12, 15)
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4. A ferroelectric liquid crystal display device comprising:
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a CMOS circuit comprising;
an n-channel TFT comprising;
a first semiconductor layer comprising a first channel formation region, a first LDD region, and first source and drain regions;
a first gate insulating film provided over the first semiconductor layer; and
a first gate electrode provided over the first gate insulating film, and partially overlapping the first LDD region, a p-channel TFT comprising;
a second semiconductor layer comprising a first channel formation region, a second LDD region, and second source and drain regions;
a second gate insulating film provided over the second semiconductor layer; and
a second gate electrode provided over the second gate insulating film, and partially overlapping the second LDD region, an insulating film comprising silicon nitride over the n-channel TFT and the p-channel TFT, wherein each of the first and second gate electrode comprises a first conductive layer, a second conductive layer provided over the first conductive layer, and a third conductive layer provided over the second conductive layer. - View Dependent Claims (7, 10, 13, 16)
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Specification