Component and Process for Manufacturing the Same

• US 20080048196A1
• Filed: 09/07/2007
• Published: 02/28/2008
• Est. Priority Date: 03/07/2005
• Status: Abandoned Application

• Current Assignee: AZZURRO Semiconductors AG
• Original Assignee: Technische Universitã¤T Berlin (Tu)
• Inventors: Reissmann, Lars, Bimberg, Dieter, Strittmatter, Andre
• Application Number:
  US11/851,909
• Publication Number:
  US 20080048196A1
• Time in Patent Office: Days
• US Class Current: 257/94
• CPC Class Codes: B82Y 20/00 Nanooptics, e.g. quantum optics or photonic crystals
• CPC Class Codes: H01L 21/02381 Silicon, silicon germanium, germanium
• CPC Class Codes: H01L 21/02433 Crystal orientation
• CPC Class Codes: H01L 21/02458 Nitrides
• CPC Class Codes: H01L 21/0254 Nitrides
• CPC Class Codes: H01L 21/02639 Preparation of substrate for selective deposition
• CPC Class Codes: H01L 21/02642 Mask materials other than SiO2 or SiN
• CPC Class Codes: H01L 21/0265 Pendeoepitaxy
• CPC Class Codes: H01L 33/007 comprising nitride compounds
• CPC Class Codes: H01L 33/20 with a particular shape, e.g. curved or truncated substrate
• CPC Class Codes: H01S 2301/176 Specific passivation layers on surfaces other than the emission facet
• CPC Class Codes: H01S 2304/12 Pendeo epitaxial lateral overgrowth [ELOG], e.g. for growing GaN based blue laser diodes
• CPC Class Codes: H01S 5/0207 Substrates having a special shape
• CPC Class Codes: H01S 5/021 Silicon based substrates
• CPC Class Codes: H01S 5/1017 Waveguide having a void for insertion of materials to change optical properties
• CPC Class Codes: H01S 5/34333 with a well layer based on Ga(In)N or Ga(In)P, e.g. blue laser

Abstract

An electrical and/or optical component and a process for manufacturing the component achieve especially good quality in the component and especially reliably avoid crystal dislocations in material layers of the component. In the process for producing a component, at least one trench is etched into a substrate, the trench is overgrown laterally by at least one semiconductor layer in such a way that the trench is completely covered by the semiconductor layer while forming a gas-filled, especially air-filled, cavity, and the component is integrated in the semiconductor layer or in a further semiconductor layer applied to the semiconductor layer, with an active region of the component being placed above the cavity.

Claims

1. A process for manufacturing an electrical and/or optical component, the process comprising the following steps:

etching at least one trench into a substrate;

laterally overgrowing the trench with at least one semiconductor layer and completely covering the trench with the semiconductor layer while forming a gas-filled, especially air-filled, cavity;

integrating an optoelectronic component into the semiconductor layer or in an additional semiconductor layer applied onto the semiconductor layer; and

placing an active region of the component above the cavity.

2. The process according to claim 1, which further comprises producing an optoelectronic element with a waveguide as the component, and placing an optically active zone of the optoelectronic element above the cavity.

3. The process according to claim 2, which further comprises aligning a longitudinal direction of the waveguide parallel to a longitudinal direction of the cavity.

4. The process according to claim 2, which further comprises producing an edge-emitting laser as the optoelectronic component, having a direction of emission extending parallel to a longitudinal direction of the cavity.

5. The process according to claim 1, which further comprises producing a transistor as the component.

6. The process according to claim 5, which further comprises producing a field-effect transistor as the transistor, having a channel area placed above the cavity, and providing a silicon substrate as the substrate.

7. The process according to claim 6, which further comprises providing a surface of the substrate with a (111) orientation and a longitudinal direction of the cavity arrayed along a (1-1 0) substrate orientation or a (1 1-2) substrate orientation.

8. The process according to claim 7, which further comprises:

after etching of the trench, providing the substrate with a passivation layer and depositing the semiconductor layer directly or indirectly on the passivation layer;

completely covering all lateral wall areas of the etched trench with the passivation layer during deposition of the passivation layer; and

depositing a GaN layer or a layer containing GaN as the semiconductor layer on the substrate.

9. The process according to claim 8, which further comprises using the passivation layer as a nucleation layer for growth of the semiconductor layer.

10. The process according to claim 8, which further comprises forming the passivation layer by a conversion of the surface of the substrate.

11. The process according to claim 8, which further comprises depositing an AlN layer or an Al_xGa_1-xN layer or a layer packet with at least one AlN layer or at least one Al_xGa_1-xN layer as the passivation layer on the substrate.

12. The process according to claim 8, which further comprises initially depositing an AlAs layer and then nitriding the AlAs layer while forming an AlN layer, to form the passivation layer.

13. An electrical and/or optical component, comprising:

a substrate having at least one trench;

at least one semiconductor layer laterally overgrown on said trench, completely covering said trench and forming a gas-filled, especially air-filled, cavity; and

an active region integrated into said semiconductor layer or a further semiconductor layer applied to said semiconductor layer, said active region disposed above said cavity.

14. The component according to claim 13, wherein the component is an optoelectronic component having a waveguide with a longitudinal direction parallel to a longitudinal direction of said cavity.

15. The component according to claim 13, wherein the component is selected from the group consisting of a light-emitting element, a light-emitting diode, a laser, a detector element and a photodiode.

16. The component according to claim 14, wherein the component is an edge-emitting laser having an emission direction parallel to the longitudinal direction of the cavity.

17. The component according to claim 13, wherein the component is a transistor.

18. The component according to claim 17, wherein said transistor is a field-effect transistor having a channel area disposed above said cavity.

19. The component according to claim 13, wherein the component is an optoelectronic component including a transistor and an optoelectronic component disposed above said cavity and electrically interconnected.

20. A process for manufacturing a component, the process comprising the following steps:

etching at least one trench into a substrate;

after etching the trench, providing the substrate with a passivation layer by depositing the passivation layer to completely cover all lateral wall areas of the etched trench with the passivation layer;

depositing at least one semiconductor layer directly or indirectly onto the passivation layer, and laterally overgrowing the trench with the semiconductor layer to completely cover the trench with the semiconductor layer while forming a gas-filled, especially air-filled cavity; and

integrating the component in the semiconductor layer or in a further semiconductor layer applied to the semiconductor layer.

21. The process according to claim 20, which further comprises forming a nucleation layer for growth of the semiconductor layer, with the passivation layer.

22. The process according to claim 20, which further comprises forming the passivation layer by conversion of a surface of the substrate.

23. The process according to claim 20, which further comprises depositing an AlN layer or an Al_xGa_1-xN layer or a layer packet with at least one AlN layer and at least one Al_xGa_1-xN layer, as the passivation layer on the substrate.

24. A process for manufacturing a component, the process comprising the following steps:

etching at least one trench into a substrate;

overgrowing the substrate laterally with at least one GaN semiconductor layer or a semiconductor layer containing GaN to completely cover the trench with the semiconductor layer while forming a gas-filled, especially air-filled, cavity;

interrupting the growth of the semiconductor layer on the substrate at least once and growing a respective intermediate layer with each interruption; and

integrating the component in the semiconductor layer or in a further semiconductor layer applied to the semiconductor layer.

25. The process according to claim 24, which further comprises generating a compressive bracing with the intermediate layer.