Semiconductor memory device
First Claim
1. A semiconductor memory device comprising:
- an array of memory cells arranged in a row direction and a column direction, each memory cell including a series circuit of a variable resistance element having two-port structure and an electrically openable and closable switch electrically connected at a first terminal to a second port of the variable resistance element, each switch in the memory cells aligned along one row being connected at a control terminal to a common word line extending in the row direction, each variable resistance element in the memory cells aligned along one column being connected at a first port to a common bit line extending in the column direction, and the switch in the memory cell being connected at a second terminal to a source line extending in the row or column direction; and
a voltage supplying means for conducting a first writing action for shifting an electrical resistance from a first state to a second state by applying a first voltage between the bit line and the source line connected to a selected memory cell to be written in the memory cell array and a third voltage to the word line connected to the control terminal of the switch in the selected memory cell thus to apply a first write voltage between the two ports of the variable resistance element in the selected memory cell, and for conducting a second writing action for shifting the electrical resistance from the second state to the first state by applying a second voltage, which is opposite in the polarity to the first voltage, between the bit line and the source line connected to the selected memory cell, and the third voltage to the word line connected to the control terminal of the switch in the selected memory cell thus to apply a second write voltage between the two ports of the variable resistance element in the selected memory cell, the second write voltage being opposite in the polarity to and different in the absolute value from the first write voltage, whereinthe variable resistance element is a nonvolatile memory element capable of storing information so that the information can be electrically written by shifting the electrical resistance between the first state and the second state when the first write voltage and the second write voltage are applied to the two ports respectively,the switch is an element that shifts conductivity from a conductive state to a non-conductive state or vice versa between the first terminal and the second terminal according to a voltage applied to the control terminal, andthe voltage supplying means comprises an n-channel enhancement type MOSFET and a p-channel enhancement type MOSFET as drive elements for driving the source line.
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Accused Products
Abstract
A semiconductor memory device comprises an array of memory cells each comprising a variable resistance element and a cell access transistor, and a voltage supplying means for applying the first voltage between the bit and source lines connected to the selected memory cell, the third voltage to the word line to apply the first write voltage between the two ports of the variable resistance element for shifting the resistance from the first state to the second state, and the second voltage opposite in polarity to the first voltage between the bit and source lines, the third voltage to the word line to apply the second write voltage opposite in polarity to and different in the absolute value from the first write voltage between the two ports for shifting the resistance from the second state to the first state, the voltage supplying means comprising an n-channel MOSFET and a p-channel MOSFET.
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Citations
26 Claims
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1. A semiconductor memory device comprising:
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an array of memory cells arranged in a row direction and a column direction, each memory cell including a series circuit of a variable resistance element having two-port structure and an electrically openable and closable switch electrically connected at a first terminal to a second port of the variable resistance element, each switch in the memory cells aligned along one row being connected at a control terminal to a common word line extending in the row direction, each variable resistance element in the memory cells aligned along one column being connected at a first port to a common bit line extending in the column direction, and the switch in the memory cell being connected at a second terminal to a source line extending in the row or column direction; and a voltage supplying means for conducting a first writing action for shifting an electrical resistance from a first state to a second state by applying a first voltage between the bit line and the source line connected to a selected memory cell to be written in the memory cell array and a third voltage to the word line connected to the control terminal of the switch in the selected memory cell thus to apply a first write voltage between the two ports of the variable resistance element in the selected memory cell, and for conducting a second writing action for shifting the electrical resistance from the second state to the first state by applying a second voltage, which is opposite in the polarity to the first voltage, between the bit line and the source line connected to the selected memory cell, and the third voltage to the word line connected to the control terminal of the switch in the selected memory cell thus to apply a second write voltage between the two ports of the variable resistance element in the selected memory cell, the second write voltage being opposite in the polarity to and different in the absolute value from the first write voltage, wherein the variable resistance element is a nonvolatile memory element capable of storing information so that the information can be electrically written by shifting the electrical resistance between the first state and the second state when the first write voltage and the second write voltage are applied to the two ports respectively, the switch is an element that shifts conductivity from a conductive state to a non-conductive state or vice versa between the first terminal and the second terminal according to a voltage applied to the control terminal, and the voltage supplying means comprises an n-channel enhancement type MOSFET and a p-channel enhancement type MOSFET as drive elements for driving the source line. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13)
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14. A semiconductor memory device comprising:
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an array of memory cells arranged in a row direction and a column direction, each memory cell including a series circuit of a variable resistance element having two-port structure and an electrically openable and closable switch electrically connected at a second terminal to a second port of the variable resistance element, each switch in the memory cells aligned along one row being connected at a control terminal to a common word line extending in the row direction, each switch in the memory cells aligned along one column being connected at a first port to a common bit line extending in the column direction, and the variable resistance element in the memory cell being connected at a first terminal to a source line extending in the row or column direction; and a voltage supplying means for conducting a first writing action for shifting an electrical resistance from a first state to a second state by applying a first voltage between the bit line and the source line connected to a selected memory cell to be written in the memory cell array and a third voltage to the word line connected to the control terminal of the switch in the selected memory cell thus to apply a first write voltage between the two ports of the variable resistance element in the selected memory cell, and for conducting a second writing action for shifting the electrical resistance from the second state to the first state by applying a second voltage, which is opposite in the polarity to the first voltage, between the bit line and the source line connected to the selected memory cell, and the third voltage to the word line connected to the control terminal of the switch in the selected memory cell thus to apply a second write voltage between the two ports of the variable resistance element in the selected memory cell, the second write voltage being opposite in the polarity to and different in the absolute value from the first write voltage, wherein the variable resistance element is a nonvolatile memory element capable of storing information so that the information can be electrically written by shifting the electrical resistance between the first state and the second state when the first write voltage and the second write voltage are applied to the two ports respectively, the switch is an element that shifts conductivity from a conductive state to a non-conductive state or vice versa between the first terminal and the second terminal according to a voltage applied to the control terminal, and the voltage supplying means comprises an n-channel enhancement type MOSFET and a p-channel enhancement type MOSFET as drive elements for driving the source line. - View Dependent Claims (15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26)
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Specification