Memory Control Circuit, Nonvolatile Storage Apparatus, and Memory Control Method

• US 20080049504A1
• Filed: 05/12/2005
• Published: 02/28/2008
• Est. Priority Date: 05/19/2004
• Status: Active Grant

• Current Assignee: Panasonic Corporation (Panasonic Holdings Corporation)
• Original Assignee: Matsushita Electric Industrial Company Limited (Panasonic Holdings Corporation)
• Inventors: Inoue, Manabu, Nakanishi, Masahiro, Izumi, Tomoaki, Kasahara, Tetsushi, Tamura, Kazuaki, Inagaki, Yoshihisa, Matsuno, Kiminori
• Granted Patent: US 7,849,382 B2
• Time in Patent Office: Days
• US Class Current: 365/185.09
• CPC Class Codes: G06F 11/1068 in sector programmable memories, e.g. flash disk G06F11/1072 takes precedence
• CPC Class Codes: G11C 16/10 Programming or data input circuits

Abstract

An address at which a writing error occurs is held, and after a completion of a series of writings, the data of the held address is read. Then, a faulty-block processing is performed only for the addresses, for which it is determined that retry of writing is required, thereby preventing an increase of faulty-blocks. This can suppress the problem that when a writing is performed in a particular flash memory, a writing error frequently occurs and a large number of faulty blocks occur.

Claims

1. A memory control circuit for a rewritable nonvolatile memory comprising:

a first management table for storing data writing conditions of said nonvolatile memory in every data writing as management data;

a second management table for copying management data of said first management table in every completion of data writing in predetermined units;

a write part for writing new data in block units to said nonvolatile memory based on management data of said first management table;

a management table update part for updating management data of said first management table so that rewriting to said written block is forbidden;

a determination part for determining whether said data writing is normally executed or not;

an error address registration part for registering addresses of blocks which are determined as said data writing is not normally executed by said determination part;

an error correction part for sequentially reading data of address registered in said error address registration part after completion of writing in predetermined units, and for detecting and correcting error; and

a termination control part for normally terminating after copying management data of said first management table to said second management table when writing in predetermined unit is set to be valid based on a data error state of address registered in said error address register, and for abnormally terminating after copying management data of said second management table to said first management table when writing in predetermined unit is set to be invalid based on a data error state of address registered in said error address register.

2. The memory control circuit according to claim 1, wherein

when error at least m bits is detected, said termination control part orders said write part to retry of writing data whose error is corrected by said error correction part to different block in said nonvolatile memory and validates the writing by ordering said management table update part to update management data of the first management table.

3. The memory control circuit according to claim 2, wherein

said termination control part orders said management table update part to set a block occurring error at least n bits (n>

=m) to be a bad block.

4. The memory control circuit according to claim 1, wherein

when it is determined that there is at least one error which exceeds correction ability, said termination control part abnormally terminates.

5. The memory control circuit according to claim 4, wherein

said termination control part orders said management table update part to set a block occurring error exceeding correction ability to be a bad block after copying management data of the second management table to the first management table and abnormally terminates after copying management data of said first management table to the second management table.

6. A nonvolatile storage apparatus comprising:

a rewritable nonvolatile memory;

a first management table for storing data writing conditions of said nonvolatile memory in every data writing as management data;

a second management table for copying management data of said first management table in every completion of data writing in predetermined units;

a write part for writing new data in block units to said nonvolatile memory based on management data of said first management table;

a management table update part for updating management data of said first management table so that rewriting to said written block is forbidden;

a determination part for determining whether said data writing is normally executed or not;

an error address registration part for registering addresses of blocks which are determined as said data writing is not normally executed by said determination part;

an error correction part for sequentially reading data of address registered in said error address registration part after completion of writing in predetermined units, and for detecting and correcting error; and

a termination control part for normally terminating after copying management data of said first management table to said second management table when writing in predetermined unit is set to be valid based on a data error state of address registered in said error address register, and for abnormally terminating after copying management data of said second management table to said first management table when writing in predetermined unit is set to be invalid based on a data error state of address registered in said error address register.

7. The nonvolatile storage apparatus according to claim 6, wherein

when error equal to or larger than m bits is detected, said termination control part orders said write part to retry of writing data whose error is corrected by said error correction part to different block in said nonvolatile memory and validates the writing by ordering said management table update part to update management data of the first management table.

8. The nonvolatile storage apparatus according to claim 7, wherein

said termination control part orders said management table update part to set a block occurring error at least n bits (n>

=m) to be a bad block.

9. The nonvolatile storage apparatus according to claim 6, wherein

when it is determined that there is at least one error which exceeds correction ability, said termination control part abnormally terminates.

10. The nonvolatile storage apparatus according to claim 9, wherein

said termination control part orders said management table update part to set a block occurring error exceeding correction ability to be a bad block after copying management data of the second management table to the first management table and abnormally terminates after copying management data of said first management table to the second management table.

11. A memory control method for rewritable nonvolatile memory comprising steps of:

storing data writing conditions of said nonvolatile memory in every data writing in a first management table as management data;

copying management data of said first management table in every completion of data writing in predetermined units to a second management table;

writing new data in block units to said nonvolatile memory based on management data of said first management table;

updating management data of said first management table so that rewriting to said written block is forbidden;

determining whether said data writing is normally executed or not by a determination part;

registering addresses of blocks which is determined as said data writing is not normally executed by said determination part to an error address registration part;

sequentially reading data of address registered in said error address registration part after completion of writing in predetermined units, and for detecting and correcting error by an error correction part; and

normally terminating after copying management data of said first management table to said second management table when writing in predetermined unit is set to be valid based on a data error state of address registered in said error address register, and abnormally terminating after copying management data of said second management table to said first management table when writing in predetermined unit is set to be invalid based on a data error state of address registered in said error address register.

12. The memory control method according to claim 11 further comprising the step of:

ordering to retry of writing data whose error is corrected by said error correction part to different block in said nonvolatile memory and validating the writing by ordering to update management data of the first management table when error at least m bits is detected.

13. The memory control method according to claim 12 further comprising the step of:

updating management data of said first management table to set a block occurring error at least n bits (n>

=m) to be a bad block.

14. The memory control method according to claim 11 further comprising the step of;

abnormally terminating when it is determined that there is at least one error which exceeds correction ability.

15. The memory control method according to claim 14 further comprising the step of:

updating management data of said first management table to set a block occurring error exceeding correction ability to be a bad block after copying management data of the second management table to the first management table and abnormally terminating after copying management data of said first management table to the second management table.