SEMICONDUCTOR STRUCTURES WITH BODY CONTACTS AND FABRICATION METHODS THEREOF
First Claim
1. A method for forming a semiconductor structure in a semiconductor wafer including a semiconductor substrate, a semiconductor layer with a plurality of semiconductor bodies, and a buried dielectric layer separating the semiconductor substrate from the semiconductor layer, the method comprising:
- building a plurality of vertical memory cells each in a corresponding one of a plurality of trenches in the semiconductor wafer;
forming a via extending through one of the semiconductor bodies and the buried dielectric layer and extending into the semiconductor substrate; and
at least partially filling the via with a plug of an electrically conductive material that extends through the buried dielectric layer to define a body contact having a first end electrically connected with the semiconductor body and a second end electrically connected with the semiconductor substrate.
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Accused Products
Abstract
A semiconductor structure for a dynamic random access memory (DRAM) cell array that includes a plurality of vertical memory cells built on a semiconductor-on-insulator (SOI) wafer and a body contact electrically coupling a semiconductor body and a semiconductor substrate of the SOI wafer. The semiconductor body includes a channel region for the access device of one of the vertical memory cells. The body contact, which extends through a buried dielectric layer of the SOI wafer, provides a current leakage path that reduces the impact of floating body effects upon the vertical memory cell. The body contact may be formed by etching a via that extends through the semiconductor body and buried dielectric layer of the SOI wafer and extends into the substrate and partially filling the via with a conductive material that electrically couples the semiconductor body with the substrate.
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Citations
11 Claims
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1. A method for forming a semiconductor structure in a semiconductor wafer including a semiconductor substrate, a semiconductor layer with a plurality of semiconductor bodies, and a buried dielectric layer separating the semiconductor substrate from the semiconductor layer, the method comprising:
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building a plurality of vertical memory cells each in a corresponding one of a plurality of trenches in the semiconductor wafer;
forming a via extending through one of the semiconductor bodies and the buried dielectric layer and extending into the semiconductor substrate; and
at least partially filling the via with a plug of an electrically conductive material that extends through the buried dielectric layer to define a body contact having a first end electrically connected with the semiconductor body and a second end electrically connected with the semiconductor substrate. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11)
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Specification