HIGHLY COMPONENTIZED SYSTEM ARCHITECTURE WITH LOADABLE VIRTUAL MEMORY MANAGER

• US 20080052711A1
• Filed: 10/31/2007
• Published: 02/28/2008
• Est. Priority Date: 09/09/1998
• Status: Active Grant

• Current Assignee: Microsoft Technology Licensing LLC (Microsoft Corporation)
• Original Assignee: Microsoft Corporation
• Inventors: Forin, Alessandro, Helander, Johannes
• Granted Patent: US 7,584,473 B2
• Time in Patent Office: Days
• US Class Current: 718/100
• CPC Class Codes: G06F 8/41 Compilation
• CPC Class Codes: G06F 9/4411 Configuring for operating with peripheral devices; Loading of device drivers
• CPC Class Codes: G06F 9/4413 Plug-and-play [PnP]
• CPC Class Codes: G06F 9/44521 Dynamic linking or loading; Link editing at or after load time, e.g. Java class loading
• CPC Class Codes: G06Q 10/10 Office automation; Time management
• CPC Class Codes: G06Q 40/00 Finance; Insurance; Tax strategies; Processing of corporate or income taxes

Abstract

The present invention is directed to a loadable virtual memory manager, and generally to a computer operating system capable of supporting application programs running in a computer having a working memory, the computer operating system including a kernel resident in the working memory at run time, and a loadable virtual memory manager resident at link time outside of the working memory and dynamically loadable into the working memory at run time upon demand of one of the application programs. The kernel includes a loader for loading the virtual memory manager into the working memory in response to a demand from one of the application programs. The computer is able to access a storage memory separate from the working memory, the loadable virtual memory manager residing at link time in the storage memory. The loader loads the virtual memory manager from the storage memory to the working memory. The loadable virtual memory manager is removable from the working memory upon lack of demand therefor by the application programs.

Claims

1. A data structure in a computer, comprising:

plural threads;

respective VMView objects associated with respective ones of said plural threads, each of said VMView objects providing different views of a common memory space to respective ones of said plural threads, whereby to provide different threads with different views of said common memory space.

2. The data structure of claim 1 wherein said common memory space has an address space width of 32 bits and one of said VMView objects provides a view of to a respective one of said threads in which said memory appears to have an address space width of 64 bits.

3. The data structure of claim 1 wherein said common memory space has an address space width of 64 bits and one of said VMView objects provides a view of to a respective one of said threads in which said memory appears to have an address space width of 32 bits.

4. The data structure of claim 1 wherein said common memory space has an address space width of 36 bits, said VMView object provides an address space width of 32 bits and a VMSpace object has a view of said common memory space with an address space width of 64 bits.

5. The data structure of claim 1 further comprising:

respective VMMap objects providing respective mappings for respective ones of said different views to respective files, whereby to map different threads with different files through respective views of said common memory space.