Assembly, production and quality assurance processes respecting electronic compliance monitor (ECM) tags

• US 20080053040A1
• Filed: 07/20/2007
• Published: 03/06/2008
• Est. Priority Date: 01/20/2005
• Status: Active Grant

• Current Assignee: Intelligent Devices SEZC Inc.
• Original Assignee: Intelligent Devices Inc. (Heico Corporation)
• Inventors: Sherstyuk, Mykola, Petersen, Michael, Wilson, Allan
• Granted Patent: US 7,937,829 B2
• Time in Patent Office: Days
• US Class Current: 53/396
• CPC Class Codes: A61J 1/035 Blister-type containers blisters in general B65D75/36
• CPC Class Codes: G16H 20/13 delivered from dispensers
• CPC Class Codes: H05K 1/0266 Marks, test patterns or identification means
• CPC Class Codes: H05K 1/0293 Individual printed conductors which are adapted for modification, e.g. fusable or breakable conductors, printed switches
• CPC Class Codes: H05K 1/14 Structural association of two or more printed circuits providing electric connection to or between printed circuits H05K1/11, H01R12/00
• CPC Class Codes: H05K 1/18 Printed circuits structurally associated with non-printed electric components H05K1/0201, H05K1/023, H05K1/0243, and H05K1/16 take precedence
• CPC Class Codes: H05K 2201/09063 Holes or slots in insulating substrate not used for electrical connections
• CPC Class Codes: H05K 2201/10037 Printed or non-printed battery
• CPC Class Codes: H05K 2201/10212 Programmable component
• CPC Class Codes: H05K 2201/10689 Leaded Integrated Circuit [IC] package, e.g. dual-in-line [DIL]
• CPC Class Codes: H05K 2203/175 Configurations of connections suitable for easy deletion, e.g. modifiable circuits or temporary conductors for electroplating; Processes for deleting connections
• CPC Class Codes: Y10T 29/4913 Assembling to base an electrical component, e.g., capacitor, etc.
• CPC Class Codes: Y10T 29/49147 Assembling terminal to base
• CPC Class Codes: Y10T 29/49155 Manufacturing circuit on or in base
• CPC Class Codes: Y10T 29/49169 Assembling electrical component directly to terminal or elongated conductor

Abstract

The Med-ic™ Electronic Compliance Monitor (ECM) addresses the problem of patient non-compliance with prescribed medication. The Med-ic™ ECM provides precise information about the patient'"'"'s use of blister-packaged medication in clinical research and general pharmacy settings. Using an on-board central processing unit (CPU), the Med-ic™ ECM records the time each tablet or capsule is expelled from the blister package, keeping a record for later analysis. At the time of refilling or follow-up visit, the information is downloaded to the research assistant'"'"'s, physician'"'"'s or pharmacist'"'"'s computer where it can be displayed graphically. The data can be stored for later analysis. Production of a Med-ic™ ECM Tag involves numerous steps. These steps incorporate certain methods and technologies to accomplish their objective, the steps being detailed in the specification.

Claims

1. A method for manufacturing a conductive grid for attachment to a blister package such that expulsion of an article from a blister of said package will rupture a conductive trace included as a component of said grid, comprising the steps of:

preparing an electronic tag having at least microcontroller means, capacitor means, oscillator means, resistor means and diode means thereon;

transferring tag identification information to said microcontrolle means;

installing battery power means to said tag for providing electrical power to said microcontroller means;

verifying the integrity of said tag and the components carried thereby;

printing a predetermined pattern of conductive traces on a substrate, said pattern being adapted to place said traces in alignment with the blisters of the blister package;

verifying resistance levels associated with said traces to ensure that they are within predetermined limits;

permanently connecting a tag to said grid such that defined connection points of said tag are conductively connected to defined portions of said traces;

verifying the integrity of the grid including the conductive traces and the tag carried thereby; and

making the grid available for assembly to a blister package.

2. The method of claim 1 wherein said preparing step includes the printing of a plurality of printed circuit boards (PCB'"'"'s) on a prepared sheet of suitable material, each said PCB being defined by a predetermined circuit incorporating said microcontroller means, capacitor means, oscillator means, resistor means and diode means as well as a location for said battery means, and each said PCB also including a plurality of holes extending therethrough.

3. The method of claim 2 wherein said transferring step includes the steps of locating said sheet of PCB'"'"'s in a nail bed portion of firmware writing apparatus, contacting specific contact points on each PCB of said sheet with pin means associated with said firmware writing apparatus, and burning said tag identification information from said apparatus to each said PCB microcontroller means.

4. The method of claim 3 wherein said tag identification information includes a unique tag identification number for each such PCB and identification of the firmware version written to each such PCB.

5. The method of claim 4 wherein said firmware writing apparatus also verifies calibration of said oscillator means and automatically marks any PCB which was not successfully programmed by said apparatus.

6. The method of claim 1 wherein said battery power means is installed to the associated PCB by soldering.

7. The method of claim 2 including the step of applying a layer of protective foam material to cover at least one surface of said sheet of PCB'"'"'s, said foam material including tag identification information.

8. The method of claim 7 including the step of applying a layer of foam material to the surface of said sheet of PCB'"'"'s opposite said at least one surface.

9. The method of claim 2 including the step of separating said sheet of PCB'"'"'s into individual tags, each having its own unique identification information associated therewith.

10. The method of claim 9 wherein said integrity verifying step includes the steps of verifying available life for each said battery power means utilizing battery test firmware written to the microcontroller means of randomly selected tags, such battery test firmware recording a reading of energy and voltage level at regular intervals for display on reading apparatus when prompted thereby, so as to monitor the performance of battery power means for specific batches of tags over an extended period of time.

11. The method of claim 10 wherein each said randomly selected tag has a reference resistor connected thereto for voltage measurements over said extended period of time.

12. The method of claim 10 wherein said integrity verifying step includes the steps of checking for timer and battery power means voltage integrity, and the marking of any tags which fail to meet predetermined minimum standards.

13. The method of claim 1 wherein said predetermined pattern of traces applied to a substrate defines a printed sensor grid (PSG) to which a tag is applied after verification of the integrity of said PSG.

14. The method of claim 13 wherein said pattern of traces includes conductive and resistive paths which are printed on one surface of the substrate using silver-based and carbon-based inks respectively, the printing step including the application of a first curable ultraviolet (UV) coating to the substrate, the application of the pattern of traces using the appropriate ink, and the application of a second coating of curable UV coating, said first UV coating serving to make the substrate more uniform and resistant to temperature and humidity effects and also improving the flexibility of the substrate, and said second UV coating serving to protect said printed inks and to prevent unwanted contact with external sources of electricity.

15. The method of claim 14 wherein said substrate is selected from the group of substrates comprising paper, paper label stock, polymer film and paper-backed foil.

16. The method of claim 14 including the step of applying a layer of a heat-sensitive adhesive to the opposite surface of said substrate.

17. The method of claim 14 wherein said substrate is commercial label stock having a self-adhesive coating on the surface thereof opposite said one surface carrying said conductive and resistive traces thereon.

18. The method of claim 14 including the step of die-cutting a region in the substrate adjacent said traces in the area where a blister of a blister package will be located so as to provide a series of score lines in the substrate, facilitating the rupturing of a trace during expulsion of an article from a blister.

19. The method of claim 14 wherein said step of connecting a tag to a PSG includes the step of positioning the tag on the substrate so that contact points of said tag are adjacent predetermined contact points associated with said traces, and stitching said tag to said substrate utilizing conductive thread.

20. The method of claim 19 wherein following the stitching of said tag to the PSG the integrity of the connection is verified as is the timing mechanism within said microcontroller and the resistance levels of the conductive traces on said PSG.

21. The method of claim 20 including the step of applying an identifying barcode to each tag and PSG assembly that passes all tests and photographing each such assembly, including all identifying data printed or presented thereon.

22. The method of claim 21 including the steps of positioning an acceptable tag and PSG assembly according to claim 16 against a comparable surface of a blister package with the heat-sensitive adhesive on said substrate abutting said blister package surface and activating said heat-sensitive adhesive for a time sufficient to cause such adhesive to melt momentarily, so as to adhere the tag and PSG assembly to the blister package.

23. The method of claim 21 including the step of applying an acceptable tag and PSG assembly according to claim 17 against a comparable surface of a blister package with the adhesive coating on said substrate adhering said tag and PSG assembly to said blister package.

24. A method for manufacturing blister packages provided with one or more conductive grids on a surface thereof such that expulsion of an article from a blister will rupture a conductive trace included as a component of said grid, comprising the steps of:

preparing an electronic tag having at least microcontroller means, capacitor means, oscillator means, resistor means and diode means thereon;

transferring tag identification information to said microcontroller means;

installing battery power means to said tag for providing electrical power to said microcontroller means;

verifying the integrity of said tag and the components carried thereby;

printing a predetermined pattern of conductive traces on a substrate, said pattern being adapted to place said traces in alignment with the blisters of the blister package;

verifying resistance levels associated with said traces to ensure that they are within predetermined limits;

permanently connecting a tag to said grid such that defined connection points of said tag are conductively connected to defined portions of said traces;

verifying the integrity of the grid including the conductive traces and the tag carried thereby; and

connecting a grid to a blister package so that each conductive trace of said grid is in alignment with a selected blister of said package, whereby rupture of a trace associated with a particular blister will provide a signal to said tag, allowing the microcontroller means carried by the tag to record the time of occurrence of the rupture event.