METHOD OF COMPENSATING OUTPUT VOLTAGE DISTORTION OF HALF-BRIDGE INVERTER AND DEVICE BASED ON THE METHOD

• US 20080062732A1
• Filed: 09/12/2006
• Published: 03/13/2008
• Est. Priority Date: 09/12/2006
• Status: Active Grant

• Current Assignee: National Chung Cheng University
• Original Assignee: National Chung Cheng University
• Inventors: Wang, Wei-Cheng, Chen, Yaow-Ming
• Granted Patent: US 7,336,513 B1
• Time in Patent Office: Days
• US Class Current: 363/98
• CPC Class Codes: H02M 7/4811 having auxiliary actively switched resonant commutation circuits connected to intermediate DC voltage or between two push-pull branches
• CPC Class Codes: H02M 7/538 in a push-pull configuration H02M7/5375 takes precedence ; with oscillating arrangements H02M7/53832, H02M7/53846

Abstract

A method of compensating output voltage distortion of a half-bridge inverter and a device based on the method discloses that the method includes the steps of measuring the voltage of the capacitor of the half-bridge inverter and then detecting the output voltage of the same; comparing the capacitor voltage and the output voltage to identify how much degree the distortion is resulted from the capacitor voltage unbalance, wherein if the degree of the distortion matches a predetermined condition, proceed to the next step; and charging the capacitor through a compensating circuit to compensate the capacitor for the insufficient electric energy to enable the capacitor to provide the load with the sufficient electric energy. Thus, the drawback that the waveform of the output voltage can be improved to enable the device and the method to have advantages of simple circuit, easy control, reduced capacitance, and being applicable to any output frequency.

Claims

1. A method of compensating capacitor voltage distortion of a half-bridge inverter, comprising steps of:

(a) measuring a voltage of at least one capacitor of said half-bridge inverter and detecting an output voltage of said half-bridge inverter;

(b) comparing said voltage of said at least one capacitor with said output voltage and then identifying a degree of distortion of said output voltage that results from capacitor voltage unbalance,

if the degree of distortion matches a predetermined condition, indicating that said capacitor has insufficient electric energy to supply electric energy to a load without generating said degree of distortion, and-then identifying said capacitor as a voltage-unbalanced capacitor, and then proceeding to the next step;

if the degree of distortion does not match the predetermined condition, indicating that said capacitor has sufficient electric energy to provide electric energy to the load without generating said degree of distortion, and not proceeding to the next step; and

(c) charging said capacitor with a compensating circuit to enable said capacitor to provide sufficient electric energy for the load without said degree of distortion.

2. The method as defined in claim 1, wherein said half-bridge inverter comprises an upper capacitor and a lower capacitor.

3. The method as defined in claim 2, wherein in step (b), during a positive half cycle of said output voltage, said upper capacitor has insufficient electric energy for the load if the degree of distortion matches one of the following conditions:

after comparison with the positive voltage of the output voltage V_O, the positive voltage of the upper capacitor C₁ is lower than that of the output voltage V_O;

after comparison with the negative voltage of the output voltage V_O, the negative voltage of the upper capacitor C₁ is higher than that of the output voltage V_O;

after comparison with the positive voltage of the output voltage V_O, the sum of the positive voltage of the input voltage V_DC of the half-bridge inverter 11 plus the negative voltage of the lower capacitor C₂ is lower than the positive voltage of the output voltage V_O; and

after comnarison with the negative voltage of the output voltage V_O, the sum of the negative voltage of the input voltage V_DC plus the positive voltage of the lower capacitor C₂ is higher than the negative voltage of the output voltage V_O.

4. The method as defined in claim 2, wherein during a negative half cycle of said output voltage, said lower capacitor has insufficient electric energy for the load if the degree of distortion matches one of the following conditions:

after comparison with the positive voltage of the output voltage V_O, the negative voltage of the lower capacitor C₂ is higher than the positive voltage of the output voltage V_O;

after comparison with the negative voltage of the output voltage V_O, the positive voltage of the lower capacitor C₂ is lower than the negative voltage of the output voltage V_O;

after comparison with the positive voltage of the output voltage V_O, the sum of the negative voltage of the input voltage V_DC of the half-bridge inverter 11 plus the positive voltage of the upper capacitor C₁ is higher than the positive voltage of the output voltage V_O; and

after compared-comparison with the negative voltage of the output voltage V_O, the sum of the positive voltage of the input voltage V_DC plus the negative voltage of the upper capacitor C₁ is lower than the negative voltage of the output voltage V_O.

5. The method as defined in claim 3 or 4, wherein said compensating circuit comprises an upper compensating switch, a lower compensating switch, and a compensating inductor;

wherein when said upper capacitor fails to provide sufficient electric energy for the load, said lower compensating switch is turned on to work together with said compensating inductor to become a charging path for charging said upper capacitor; and

wherein when said lower capacitor fails to provide sufficient electric energy for the load, said upper compensating switch is turned on to work together with said compensating inductor to become a charging path for charging said lower capacitor.

6. A device based on the method defined in claim 1, comprising:

a half-bridge inverter having an upper capacitor and a lower capacitor, which are serially interconnected, a first switch and a second switch, which are serially interconnected, and an inductor having two ends, one of which is connected to a node located between said first and second switches and the other of which is defined as a first output end, a node located between said upper and lower capacitors being defined as a second output end, a voltage difference between said first and second output ends being said output voltage; and

a compensating circuit having an upper compensating switch, a lower compensating switch, and a compensating inductor, said upper and lower compensating switches being serially interconnected, said compensating inductor having two ends, one of which is connected to a node located between said upper and lower compensating switches and the other of which is connected to a node located between said upper and lower capacitors.

7. The device as defined in claim 6, further comprising a controller and a comparator, wherein said controller is connected to said upper and lower compensating switches, and said comparator is connected to said output voltage and said lower capacitor.