Device coupled between serial busses using bitwise arbitration
First Claim
1. A method of communicating between first and second serial data busses, each bus comprising one or more nodes coupled via the respective data bus so that simultaneous transmission on the respective bus of a dominant state by at least one of the nodes and a recessive state by the other nodes results in the dominant state being detectable on the respective bus, the method comprising:
- transmitting onto the first bus transitions from a first state to a second state, wherein the first and second states are complementary states selected from the dominant and recessive states, each of the transitions signaling the start of a bit on the first bus;
detecting dominant and recessive states on the first bus at a first predetermined time after each transition and on the second bus at a second predetermined time after each transition, the states representing respective dominant and recessive bits of attempted messages transmitted by nodes of the first and second busses; and
transmitting the dominant state on both the first and second bus after the first and second predetermined times if the dominant state was detected on at least one of the first bus and the second bus at the respective first and second predetermined times.
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Accused Products
Abstract
Communicating between first and second serial data busses is described. Each bus includes one or more nodes coupled via the respective data bus so that simultaneous transmission on the respective bus of a dominant state by at least one of the nodes and a recessive state by the other nodes results in the dominant state being detectable on the respective bus. Transitions from a first state to a second state are transmitted onto the first bus. The first and second states are complementary states selected from the dominant and recessive states. Each of the transitions signal the start of a bit on the first bus. Dominant and recessive states are detected on the first bus at a first predetermined time after each transition and on the second bus at a second predetermined time after each transition. The states represent respective dominant and recessive bits of attempted messages transmitted by nodes of the first and second busses. The dominant state is transmitted on both the first and second bus after the first and second predetermined times if the dominant state was detected on at least one of the first bus and the second bus at the respective first and second predetermined times.
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Citations
26 Claims
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1. A method of communicating between first and second serial data busses, each bus comprising one or more nodes coupled via the respective data bus so that simultaneous transmission on the respective bus of a dominant state by at least one of the nodes and a recessive state by the other nodes results in the dominant state being detectable on the respective bus, the method comprising:
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transmitting onto the first bus transitions from a first state to a second state, wherein the first and second states are complementary states selected from the dominant and recessive states, each of the transitions signaling the start of a bit on the first bus; detecting dominant and recessive states on the first bus at a first predetermined time after each transition and on the second bus at a second predetermined time after each transition, the states representing respective dominant and recessive bits of attempted messages transmitted by nodes of the first and second busses; and transmitting the dominant state on both the first and second bus after the first and second predetermined times if the dominant state was detected on at least one of the first bus and the second bus at the respective first and second predetermined times. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11)
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12. An apparatus operable in a data processing arrangement that includes first and second serial data busses, each bus having one or more nodes coupled via the respective data bus so that simultaneous transmission on the respective bus of a dominant state by at least one of the nodes and a recessive state by the other nodes results in the dominant state being detectable on the respective bus, the apparatus comprising:
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a first transceiver coupled to the first bus and capable of transmitting and receiving the dominant and recessive states via the first bus; a second transceiver coupled to the second bus and capable of transmitting and receiving the dominant and recessive states via the second bus; a processor coupled to the first and second transceivers; and memory coupled to the processor, the memory having instructions that cause the processor to, transmit, via the first transceiver, repeated transitions from a first state to a second state on the first bus, wherein the first and second states are complementary states selected from the dominant and recessive states; detect via the first transceiver dominant and recessive states on the first bus at a first predetermined time after each transition; detect via the second transceiver dominant and recessive states on the second bus at a second predetermined time after each transition; and transmit the dominant state on both the first and second bus after the first and second predetermined times if the dominant state was detected on either the first bus or the second bus at respective first and second predetermined times. - View Dependent Claims (13, 14, 15, 16, 17, 18, 19, 20)
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21. A system, comprising:
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a first and second serial bus; and a first and second plurality of nodes respectively coupled via the first and second serial busses so that simultaneous transmission on the respective bus of a dominant state by one of the nodes and a recessive state by any other of the nodes results in the dominant state being detectable on the respective bus; and an apparatus coupled to the first and second busses, the apparatus including, means for transmitting repeated transitions from a first state to a second state on the first bus, wherein the first and second states are complementary states selected from the dominant and recessive states; means for detecting dominant and recessive states on the first bus at a first predetermined time after each transition; means for detecting dominant and recessive states on the second bus at a second predetermined time after each transition; and means for transmitting the dominant state on both the first and second bus after the first and second predetermined times if the dominant state was detected on either the first bus or the second bus at respective first and second predetermined times. - View Dependent Claims (22, 23, 25, 26)
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24. A processor-readable medium, comprising:
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a program storage medium configured with instructions for use by a device coupled to first and second serial data busses, each bus comprising one or more nodes coupled via the respective data bus so that simultaneous transmission on the respective bus of a dominant state by at least one of the nodes and a recessive state by the other nodes results in the dominant state being detectable on the respective bus, the instructions causing a processor of the device to perform the operations of, transmitting repeated transitions from a first state to a second state on the first bus, wherein the first and second states are complementary states selected from the dominant and recessive states; detecting dominant and recessive states on the first bus at a first predetermined time after each transition; detecting dominant and recessive states on the second bus at a second predetermined time after each transition; and transmitting the dominant state on both the first and second bus after the first and second predetermined times if the dominant state was detected on either the first bus or the second bus at respective first and second predetermined times.
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Specification