Method for fabricating a wafer level package having through wafer vias for external package connectivity

• US 20080064142A1
• Filed: 10/26/2007
• Published: 03/13/2008
• Est. Priority Date: 03/21/2005
• Status: Abandoned Application

• Current Assignee: Skyworks Solutions Incorporated
• Original Assignee: Skyworks Solutions Incorporated
• Inventors: WARREN, ROBERT, LOBIANCO, ANTHONY, GAN, QING
• Application Number:
  US11/978,026
• Publication Number:
  US 20080064142A1
• Time in Patent Office: Days
• US Class Current: 438/118
• CPC Class Codes: B81B 2207/095 through the lid
• CPC Class Codes: B81C 1/00301 Connecting electric signal lines from the MEMS device with external electrical signal lines, e.g. through vias
• CPC Class Codes: H01L 23/10 characterised by the material or arrangement of seals between parts, e.g. between cap and base of the container or between leads and walls of the container
• CPC Class Codes: H01L 23/3114 the device being a chip scale package, e.g. CSP
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H01L 2924/01079 Gold [Au]

Abstract

According to an exemplary embodiment, a method for fabricating a wafer level package includes forming a polymer layer on a device wafer, where the device wafer includes at least one device wafer contact pad and a device, and where the at least one device wafer contact pad is electrically connected to the device. The method further includes bonding a protective wafer to the device wafer. The method further includes forming at least one via in the protective wafer, where the at least one via extends through the protective wafer and is situated over the at least one device wafer contact pad. The method further includes forming at least one protective wafer contact pad on the protective wafer, where the at least one protective wafer contact pad is situated over the at least one via and electrically connected to the at least one device wafer contact pad.

Claims

1. A method for fabricating a wafer level package, said method comprising:

forming a polymer layer on a device wafer, said device wafer comprising at least one device wafer contact pad and at least one device, said at least one device wafer contact pad being electrically connected to said at least one device;

bonding a protective wafer to said device wafer;

forming at least one via in said protective wafer, said at least one via extending through said protective wafer;

wherein said at least one via is situated over said at least one device wafer contact pad.

2. The method of claim 1 further comprising a step of forming at least one opening and a seal ring in said polymer layer prior to said step of bonding said protective wafer to said device wafer, wherein said at least one opening is situated over said at least one device wafer contact pad and said seal ring surrounds said at least one device.

3. The method of claim 1 further comprising a step of filling said at least one via with a conductive layer, wherein said conductive layer is in contact with said at least one device wafer contact pad.

4. The method of claim 1 further comprising a step of forming at least one protective wafer contact pad on said protective wafer, wherein said at least one protective wafer contact pad is situated over said at least one via and electrically connected to said at least one device wafer contact pad.

5. The method of claim 4 further comprising a step of forming at least one solder bump on said at least one protective wafer contact pad.

6. The method of claim 1 further comprising a step of performing a thinning process to achieve a target thickness of said protective wafer prior to said step of forming said at least one via in said protective wafer.

7. The method of claim 1 further comprising a step of performing a thinning process to achieve a target thickness of said device wafer.

8. The method of claim 1 further comprising a step of forming a cavity in said protective wafer prior to said step of bonding said protective wafer to said device wafer.

9. The method of claim 1 wherein said at least one via has a diameter of between approximately 10.0 microns and approximately 100.0 microns.

10. The method of claim 1 wherein said polymer layer comprises a photoimageable polymer.

11-20. -20. (canceled)

21. A method for fabricating a wafer level package, said method comprising:

forming a polymer layer on a device wafer, said device wafer comprising at least one device wafer contact pad and at least one device, said at least one device wafer contact pad being electrically connected to said at least one device;

forming a seal ring and at least one opening in said polymer layer, said seal ring surrounding said at least one device and said at least one opening being situated over said at least one device wafer contact pad;

bonding a protective wafer to said device wafer in a bonding process;

wherein said bonding process utilizes said polymer layer as a bonding layer.

22. The method of claim 21 further comprising a step of forming at least one via in said protective wafer, wherein said at least one via extends through said protective wafer and is situated over said at least one device wafer contact pad.

23. The method of claim 22 further comprising a step of filling said at least one via with a conductive layer, wherein said conductive layer is in contact with said at least one device wafer contact pad.

24. The method of claim 22 further comprising a step of forming at least one protective wafer contact pad on said protective wafer, wherein said at least one protective wafer contact pad is situated over said at least one via and electrically connected to said at least one device wafer contact pad.

25. The method of claim 21 further comprising a step of performing a thinning process to achieve a target thickness of said protective wafer.

26. The method of claim 22 further comprising a step of performing a thinning process to achieve a target thickness of said device wafer.

27. The method of claim 21 further comprising a step of forming a cavity in said protective wafer prior to said step of bonding said protective wafer to said device wafer.

28. The method of claim 21 wherein said bonding process is performed at a temperature of between approximately 100.0°

C. and approximately 500.0°

C.

29. The method of claim 22 wherein said at least one via has a diameter of between approximately 10.0 microns and approximately 100.0 microns.

30. The method of claim 21 wherein said polymer layer comprises a photoimageable polymer.