Direct cache access in multiple core processors
First Claim
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1. A processor comprising:
- a first logic to cause storage of data corresponding to one or more direct cache access requests in a storage unit; and
a second logic to generate a read request corresponding to one of the direct access requests.
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Abstract
Methods and apparatus to perform direct cache access in multiple core processors are described. In an embodiment, data corresponding to a direct cache access request is stored in a storage unit and a corresponding read request is generated. Other embodiments are also described.
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Citations
30 Claims
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1. A processor comprising:
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a first logic to cause storage of data corresponding to one or more direct cache access requests in a storage unit; and a second logic to generate a read request corresponding to one of the direct access requests. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13)
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14. A method comprising:
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storing data corresponding to a memory request in a direct cache access queue after determining that the memory request comprises a direct cache access hint; and generating a read request corresponding to the memory request after a predetermined time period. - View Dependent Claims (15, 16, 17, 18, 19, 20)
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21. A computing system comprising:
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an input/output (I/O) device to cause transmission of a snoop request; and at least one processor comprising; a direct cache access queue to store a plurality of bits representing a direct cache access request corresponding to the snoop request; and a hint check logic to decode the snoop request and cause storage of the plurality of bits in the direct cache access queue in response to a direct cache access hint embedded with the snoop request. - View Dependent Claims (22, 23, 24, 25)
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26. An apparatus comprising:
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a first logic to detect whether a memory access request corresponds to a direct cache access request and to cause data corresponding to the direct cache access request to be stored in a storage unit; and a second logic to generate a read request corresponding to the direct access requests, the second logic to generate the read request in response to an expiration of a time period corresponding to the direct cache access request. - View Dependent Claims (27, 28, 29, 30)
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Specification