Semiconductor Materials and Devices

• US 20080067532A1
• Filed: 11/04/2005
• Published: 03/20/2008
• Est. Priority Date: 11/11/2004
• Status: Active Grant

• Current Assignee: University of Strathclyde
• Original Assignee: University of Strathclyde
• Inventors: Martin, Robert, Edwards, Paul, Watson, Ian, Dawson, Martin, Gu, Erdan
• Granted Patent: US 7,566,579 B2
• Time in Patent Office: Days
• US Class Current: 257/98
• CPC Class Codes: B82Y 20/00 Nanooptics, e.g. quantum optics or photonic crystals
• CPC Class Codes: H01L 33/32 containing nitrogen
• CPC Class Codes: H01S 2304/04 MOCVD or MOVPE
• CPC Class Codes: H01S 5/0207 Substrates having a special shape
• CPC Class Codes: H01S 5/041 Optical pumping
• CPC Class Codes: H01S 5/18341 Intra-cavity contacts
• CPC Class Codes: H01S 5/18358 containing spacer layers to adjust the phase of the light wave in the cavity
• CPC Class Codes: H01S 5/18369 based on dielectric materials
• CPC Class Codes: H01S 5/18383 with periodic active regions at nodes or maxima of light intensity
• CPC Class Codes: H01S 5/34333 with a well layer based on Ga(In)N or Ga(In)P, e.g. blue laser

Abstract

A method of growing semiconductor materials in the Indium, Aluminium, Gallium Nitride (InAlGaN) material system and to devices made therefrom, in particular optical devices in the ultraviolet to green region of the visible spectrum. Certain optical devices, for example Vertical Cavity Surface Emitting Lasers (VCSELs) require great precision in the thickness of certain semiconductor layers. One aspect of the present invention provides a gallium-rich group III nitride layer (200, 201) and an adjacent layer of Al_xIn_yGa_1-x-yN layer (202). The Al_xIn_yGa_1-x-yN layer (202) acts as a fabrication facilitation layer and is selected to provide a good lattice match and high refractive index contrast with the gallium-rich group III nitride layer (200, 201). The high refractive index contrast permits in-situ optical monitoring. The extra layer (202) can be used as an etch marker or etch stop layer in subsequent processing and may be used in a lift-off process.

Claims

1. A semiconductor device fabricated from the AlInGaN material system, the device comprising at least a first gallium-rich group III nitride layer, at least a first Al_xIn_yGa_1-x-yN layer adjacent the first gallium-rich group III nitride layer, and a further layer in the AlInGaN system adjacent to the first Al_xIn_yGa_1-x-yN layer, wherein the values of x and y are such as to provide lattice-match to the first gallium-rich group III nitride layer so that the in plane strain is less than +/−

1%, and the first Al_xIn_yGa_1-x-yN layer is such as to provide a detectable refractive index contrast with the at least one further layer in the AlInGaN material system or the first gallium-rich group III nitride layer.

2. A semiconductor device as claimed in claim 1, wherein the values of x and y in the first Al_xIn_yGa_1-x-yN layer are also such as to provide a second lattice-match with the at least one further layer in the AlInGaN system such that the in plane strain is less than +/−

1%.

3. A semiconductor device as claimed in claim 1, wherein the value of x is substantially 5y.

4. A semiconductor device as claimed in claim 3, wherein x+y=1 and y=0.17+/−

0.02.

5. A semiconductor device as claimed in claim 1, wherein the device comprises a resonant cavity light emitter.

6. A semiconductor device as claimed in claim 5, wherein the at least one further layer in the AlInGaN material system is part of an active region.

7. A semiconductor device as claimed in claim 1 wherein the first gallium-rich group III nitride layer comprises the substrate.

8. A semiconductor device as claimed in claim 1, further comprising a substrate.

9. A semiconductor device as claimed in claim 8 wherein the substrate comprises gallium nitride.

10. A semiconductor device as claimed in claim 1, wherein the value of x in the first Al_xIn_yGa_1-x-yN layer is such as to provide lattice-match to the first gallium rich group III nitride layer such that the in plane strain is less than +/−

0.25%.

11. A semiconductor device as claimed in claim 1, wherein the first Al_xIn_yGa_1-x-yN layer has an optical thickness substantially equal to an odd integer multiple of λ

/4, where λ

is the optical monitoring wavelength.

12. A semiconductor device as claimed in claim 1, wherein the device is an optical device and the device further comprises an active region, a top mirror above the active region and a bottom mirror adjacent to the first Al_xIn_yGa_1-x-yN layer.

13. A semiconductor device as claimed in claim 1, wherein the device is an optical device and the device further comprises an active region, a top mirror above the active region and a bottom mirror adjacent the further layer in the AlInGaN system and located in a hole through the Al_xIn_yGa_1-x-yN layer.

14. A semiconductor device as claimed in claim 1, wherein values of x and y are such as to provide a differential etch rate between the first Al_xIn_yGa_1-x-yN layer and at least one of the first gallium-rich group III nitride layer and the further layer in the AlInGaN system.

15. A semiconductor device as claimed in claim 1 comprising a dielectric reflector located in a hole in either the first gallium-rich group III nitride layer or the further layer in the AlInGaN system.

16. A method of fabricating a semiconductor layer in the InAlGaN material system on a gallium-rich group III nitride layer, the method comprising:

growing a Al_xIn_yGa_1-x-yN fabrication facilitation layer on a first surface of the gallium-rich group III nitride layer,

growing at least one further layer in the InAlGaN material system above the fabrication facilitation layer while growth rate information is determined optically,

wherein x and y are such as to provide lattice match with the gallium rich group III nitride layer such that the in plane strain is less than +/−

1% and wherein the Al_xIn_yGa_1-x-yN layer is such as to provide a detectable refractive index contrast with the at least one further layer in the AlInGaN material system or the first gallium-rich group III nitride layer.

17. A method as claimed in claim 16, wherein the at least one further layer is grown on the Al_xIn_yGa_1-x-yN layer.

18. A method as claimed in claim 16, wherein the values of x and y in the Al_xIn_yGa_1-x-yN layer are also such as to provide at least a second lattice-match with the at least one further layer in the AlInGaN system such that the in plane strain is less than +/−

1%,

19. A method as claimed in claim 16, wherein the value of x is substantially 5y.

20. A method as claimed in claim 19, wherein x+y=1 and y=0.17+/−

0.02.

21. A method as claimed in claim 16 further comprising growth of a subsequent layer in response to the growth rate information.

22. A method as claimed in claim 21, wherein the subsequent layer is grown in a different growth regime from the at least one further layer.

23. A method as claimed in claim 22, wherein a prior calibration run is performed to determine the relationship between the two growth regimes.

24. A method as claimed in claim 16 wherein at least the growth of the at least one further layer is controlled by closed loop control.

25. A method as claimed in claim 16, wherein growth rate information is determined optically during the growth of the fabrication facilitation layer.

26. A method as claimed in claim 16, wherein the fabrication facilitation layer has an optical thickness of substantially an odd integer multiple of λ

/4, where λ

is the wavelength of the light used for the optical monitoring.

27. A method as claimed in claim 16, further comprising etching one of the gallium rich group III nitride layer and the further layer in the AlInGaN material system using the fabrication facilitation layer as an etch stop layer.

28. A method as claimed in claim 16, further comprising etching one of the gallium rich group III nitride layer and the further layer in the AlInGaN material system using the fabrication facilitation layer as an etch marker layer.

29. A method as claimed in claim 27, wherein the etching step is a dry etching step.

30. A method as claimed in claim 29, further comprising a wet etching step.

31. A method as claimed in claim 27, wherein the etching step is a wet etching step and the method further comprises a machining step conducted before the etching step.

32. A method as claimed in claim 27, wherein the termination of the etching step is detected by the presence of ions liberated from the fabrication facilitation layer.

33. A method as claimed in claim 16, wherein the optically-derived growth rate information is used to control the growth rate of a still further layer on a different wafer.

34. A semiconductor device fabricated from the AlInGaN material system, the device comprising at least a first gallium-rich group III nitride layer, at least a first Al_xIn_yGa_1-x-yN layer adjacent the first gallium-rich group III nitride layer and a further layer in the AlInGaN material system adjacent the Al_xIn_yGa_1-x-yN layer, the device further comprising at least a dielectric reflector located in a hole in either the first gallium-rich group III nitride layer or the further layer in the AlInGaN material system, wherein the values of x and y are such as to provide lattice match to either the first gallium-rich group III nitride layer or the further layer in the AlInGaN system such that the in plane strain is less than +/−

1%.

35. A semiconductor device as claimed in claim 34, wherein x is substantially equal to 5y.

36. A semiconductor device as claimed in claim 35, wherein x+y=1 and y 0.17+/−

0.02.

37. A semiconductor device as claimed in claim 34, wherein the values of x and y are such as to provide a lattice match to the other of the first gallium-rich group III nitride layer and the further layer in the AlInGaN material system such that the in plane strain is less than +/−

1%.

38. A semiconductor device as claimed in claim 34, further comprising an active region and a mirror structure above the active region to provide a vertical cavity light emitting device.

39. A semiconductor device as claimed in claim 34, wherein the hole extends through the first Al_xIn_yGa_1-x-yN layer.

40. A semiconductor device as claimed in claim 34, wherein the value of at least one of x and y is such as to provide a differential etch rate between the Al_xIn_yGa_1-x-yN layer and either the first gallium-rich group III nitride layer or the further layer in the AlInGaN material system.

41. A method of selectively etching a first gallium rich group III nitride layer from a second gallium rich group III nitride layer, the method comprising growing a Al_xIn_yGa_1-x-yN fabrication facilitation layer on a first surface of the first gallium-rich group III nitride layer,

growing the second gallium rich group III nitride layer on the fabrication facilitation layer,

etching one of the first gallium rich group III nitride layer and the second gallium rich group III nitride layer and terminating the etching process at the fabrication facilitation layer wherein x and y are such as to provide lattice match with at least one of the gallium rich group III nitride layers such that the in plane strain is less than +/−

1%.

42. A method as claimed in claim 41, wherein the etching is terminated in response to detection of chemical species liberated from the fabrication facilitation layer.

43. A method as claimed in claim 41, wherein the etching is terminated due to differential etch rates between the fabrication facilitation layer and the one of the first and second gallium rich group III nitride layers.

44. A method as claimed in claim 41, further comprising etching away the fabrication facilitation layer.

45. A method as claimed in claim 41, wherein the etching step is a dry etching step.

46. A method of etching a first gallium-rich group III nitride layer from a further gallium-rich group III nitride layer, the method comprising:

growing a Al_xIn_yGa_1-x-yN layer fabrication facilitation layer on a first surface of the first gallium-rich group III nitride layer,

growing at least one further gallium rich group III nitride layer on the fabrication facilitation layer,

penetrating one of the first gallium rich group III nitride layer and the further gallium rich group III nitride layer as far as the fabrication facilitation layer and etching the fabrication facilitation layer,

wherein x and y are such as to provide lattice match with at least one of the gallium rich group III nitride layers such that the in plane strain is less than +/−

1%.

47. A method as claimed in claim 46, wherein the etching is performed using an alkaline wet etch.

48. A method as claimed in claim 47, wherein the etch comprises a high-temperature solvent-free melt.

49. A method as claimed in claim 46, wherein the penetrating step includes mechanical machining and/or an ablation technique, such as laser machining.

50. A method as claimed in claim 49, wherein the penetrating step further comprises a dry etch step with end point detection.